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Searched refs:CMU_ADCCTRL_ADC0CLKDIV_DEFAULT (Results 1 – 25 of 64) sorted by relevance

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/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_cmu.h2368 #define CMU_ADCCTRL_ADC0CLKDIV_DEFAULT (_CMU_ADCCTRL_ADC0CLKDIV_DEFAULT << 0) … macro
Defm32gg12b390f1024gl112.h6184 #define CMU_ADCCTRL_ADC0CLKDIV_DEFAULT (_CMU_ADCCTRL_ADC0CLKDIV_DEFAULT << 0) … macro
Defm32gg12b390f512gl112.h6184 #define CMU_ADCCTRL_ADC0CLKDIV_DEFAULT (_CMU_ADCCTRL_ADC0CLKDIV_DEFAULT << 0) … macro
Defm32gg12b530f512il120.h7013 #define CMU_ADCCTRL_ADC0CLKDIV_DEFAULT (_CMU_ADCCTRL_ADC0CLKDIV_DEFAULT << 0) … macro
Defm32gg12b530f512im64.h7013 #define CMU_ADCCTRL_ADC0CLKDIV_DEFAULT (_CMU_ADCCTRL_ADC0CLKDIV_DEFAULT << 0) … macro
Defm32gg12b530f512iq100.h7013 #define CMU_ADCCTRL_ADC0CLKDIV_DEFAULT (_CMU_ADCCTRL_ADC0CLKDIV_DEFAULT << 0) … macro
Defm32gg12b530f512iq64.h7013 #define CMU_ADCCTRL_ADC0CLKDIV_DEFAULT (_CMU_ADCCTRL_ADC0CLKDIV_DEFAULT << 0) … macro
Defm32gg12b530f512gq100.h7013 #define CMU_ADCCTRL_ADC0CLKDIV_DEFAULT (_CMU_ADCCTRL_ADC0CLKDIV_DEFAULT << 0) … macro
Defm32gg12b530f512gq64.h7013 #define CMU_ADCCTRL_ADC0CLKDIV_DEFAULT (_CMU_ADCCTRL_ADC0CLKDIV_DEFAULT << 0) … macro
Defm32gg12b530f512il112.h7013 #define CMU_ADCCTRL_ADC0CLKDIV_DEFAULT (_CMU_ADCCTRL_ADC0CLKDIV_DEFAULT << 0) … macro
Defm32gg12b110f1024gm64.h6982 #define CMU_ADCCTRL_ADC0CLKDIV_DEFAULT (_CMU_ADCCTRL_ADC0CLKDIV_DEFAULT << 0) … macro
Defm32gg12b110f1024gq64.h6982 #define CMU_ADCCTRL_ADC0CLKDIV_DEFAULT (_CMU_ADCCTRL_ADC0CLKDIV_DEFAULT << 0) … macro
Defm32gg12b530f512gl112.h7013 #define CMU_ADCCTRL_ADC0CLKDIV_DEFAULT (_CMU_ADCCTRL_ADC0CLKDIV_DEFAULT << 0) … macro
Defm32gg12b530f512gl120.h7013 #define CMU_ADCCTRL_ADC0CLKDIV_DEFAULT (_CMU_ADCCTRL_ADC0CLKDIV_DEFAULT << 0) … macro
Defm32gg12b530f512gm64.h7013 #define CMU_ADCCTRL_ADC0CLKDIV_DEFAULT (_CMU_ADCCTRL_ADC0CLKDIV_DEFAULT << 0) … macro
Defm32gg12b510f1024gq100.h7013 #define CMU_ADCCTRL_ADC0CLKDIV_DEFAULT (_CMU_ADCCTRL_ADC0CLKDIV_DEFAULT << 0) … macro
Defm32gg12b510f1024gq64.h7013 #define CMU_ADCCTRL_ADC0CLKDIV_DEFAULT (_CMU_ADCCTRL_ADC0CLKDIV_DEFAULT << 0) … macro
Defm32gg12b510f1024gl112.h7013 #define CMU_ADCCTRL_ADC0CLKDIV_DEFAULT (_CMU_ADCCTRL_ADC0CLKDIV_DEFAULT << 0) … macro
Defm32gg12b510f1024gl120.h7013 #define CMU_ADCCTRL_ADC0CLKDIV_DEFAULT (_CMU_ADCCTRL_ADC0CLKDIV_DEFAULT << 0) … macro
Defm32gg12b510f1024gm64.h7013 #define CMU_ADCCTRL_ADC0CLKDIV_DEFAULT (_CMU_ADCCTRL_ADC0CLKDIV_DEFAULT << 0) … macro
Defm32gg12b510f1024il112.h7013 #define CMU_ADCCTRL_ADC0CLKDIV_DEFAULT (_CMU_ADCCTRL_ADC0CLKDIV_DEFAULT << 0) … macro
Defm32gg12b510f1024il120.h7013 #define CMU_ADCCTRL_ADC0CLKDIV_DEFAULT (_CMU_ADCCTRL_ADC0CLKDIV_DEFAULT << 0) … macro
Defm32gg12b510f1024im64.h7013 #define CMU_ADCCTRL_ADC0CLKDIV_DEFAULT (_CMU_ADCCTRL_ADC0CLKDIV_DEFAULT << 0) … macro
Defm32gg12b510f1024iq100.h7013 #define CMU_ADCCTRL_ADC0CLKDIV_DEFAULT (_CMU_ADCCTRL_ADC0CLKDIV_DEFAULT << 0) … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_cmu.h2435 #define CMU_ADCCTRL_ADC0CLKDIV_DEFAULT (_CMU_ADCCTRL_ADC0CLKDIV_DEFAULT << 0) … macro

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