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Searched refs:CMU (Results 1 – 25 of 463) sorted by relevance

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/hal_silabs-latest/simplicity_sdk/platform/emlib/inc/
Dsli_em_cmu.h94 CMU->SYSCLKCTRL = (CMU->SYSCLKCTRL & ~_CMU_SYSCLKCTRL_CLKSEL_MASK) \
103 CMU->SYSCLKCTRL = (CMU->SYSCLKCTRL & ~_CMU_SYSCLKCTRL_CLKSEL_MASK) \
114 CMU->SYSCLKCTRL = (CMU->SYSCLKCTRL & ~_CMU_SYSCLKCTRL_CLKSEL_MASK) \
122 CMU->SYSCLKCTRL = (CMU->SYSCLKCTRL & ~_CMU_SYSCLKCTRL_CLKSEL_MASK) \
132 CMU->SYSCLKCTRL = (CMU->SYSCLKCTRL & ~_CMU_SYSCLKCTRL_CLKSEL_MASK) \
142 CMU->IADCCLKCTRL = (CMU->IADCCLKCTRL & ~_CMU_IADCCLKCTRL_CLKSEL_MASK) \
151 CMU->IADCCLKCTRL = (CMU->IADCCLKCTRL & ~_CMU_IADCCLKCTRL_CLKSEL_MASK) \
160 CMU->IADCCLKCTRL = (CMU->IADCCLKCTRL & ~_CMU_IADCCLKCTRL_CLKSEL_MASK) \
169 CMU->EM01GRPACLKCTRL = (CMU->EM01GRPACLKCTRL & ~_CMU_EM01GRPACLKCTRL_CLKSEL_MASK) \
195 CMU->EM01GRPACLKCTRL = (CMU->EM01GRPACLKCTRL & ~_CMU_EM01GRPACLKCTRL_CLKSEL_MASK) \
[all …]
Dem_chip.h224 clkEn = CMU->HFBUSCLKEN0; in CHIP_Init()
225 CMU->HFBUSCLKEN0 = clkEn | CMU_HFBUSCLKEN0_GPIO; in CHIP_Init()
233 CMU->HFBUSCLKEN0 = clkEn; in CHIP_Init()
239 CMU->HFXOSTARTUPCTRL = in CHIP_Init()
240 (CMU->HFXOSTARTUPCTRL & ~_CMU_HFXOSTARTUPCTRL_IBTRIMXOCORE_MASK) in CHIP_Init()
271 CMU->LFRCOCTRL = (CMU->LFRCOCTRL & ~_CMU_LFRCOCTRL_VREFUPDATE_MASK) in CHIP_Init()
297 CMU->HFBUSCLKEN0 |= CMU_HFBUSCLKEN0_LE; in CHIP_Init()
298 CMU->LFACLKEN0 |= CMU_LFACLKEN0_LCD; in CHIP_Init()
300 CMU->LFACLKEN0 &= ~CMU_LFACLKEN0_LCD; in CHIP_Init()
301 CMU->HFBUSCLKEN0 &= ~CMU_HFBUSCLKEN0_LE; in CHIP_Init()
[all …]
Dem_rtcc.h769 uint32_t lfeReg = CMU->LFECLKEN0; in RTCC_Lock()
770 bool cmuLocked = (CMU->LOCK == CMU_LOCK_LOCKKEY_LOCKED); in RTCC_Lock()
772 CMU->LOCK = CMU_LOCK_LOCKKEY_UNLOCK; in RTCC_Lock()
774 CMU->LFECLKEN0 = 0x0; in RTCC_Lock()
779 CMU->LFECLKEN0 = lfeReg; in RTCC_Lock()
781 CMU->LOCK = CMU_LOCK_LOCKKEY_LOCK; in RTCC_Lock()
956 uint32_t lfeReg = CMU->LFECLKEN0; in RTCC_Unlock()
957 bool cmuLocked = (CMU->LOCK == CMU_LOCK_LOCKKEY_LOCKED); in RTCC_Unlock()
959 CMU->LOCK = CMU_LOCK_LOCKKEY_UNLOCK; in RTCC_Unlock()
961 CMU->LFECLKEN0 = 0x0; in RTCC_Unlock()
[all …]
/hal_silabs-latest/gecko/emlib/inc/
Dsli_em_cmu.h94 CMU->SYSCLKCTRL = (CMU->SYSCLKCTRL & ~_CMU_SYSCLKCTRL_CLKSEL_MASK) \
103 CMU->SYSCLKCTRL = (CMU->SYSCLKCTRL & ~_CMU_SYSCLKCTRL_CLKSEL_MASK) \
114 CMU->SYSCLKCTRL = (CMU->SYSCLKCTRL & ~_CMU_SYSCLKCTRL_CLKSEL_MASK) \
122 CMU->SYSCLKCTRL = (CMU->SYSCLKCTRL & ~_CMU_SYSCLKCTRL_CLKSEL_MASK) \
132 CMU->SYSCLKCTRL = (CMU->SYSCLKCTRL & ~_CMU_SYSCLKCTRL_CLKSEL_MASK) \
142 CMU->IADCCLKCTRL = (CMU->IADCCLKCTRL & ~_CMU_IADCCLKCTRL_CLKSEL_MASK) \
151 CMU->IADCCLKCTRL = (CMU->IADCCLKCTRL & ~_CMU_IADCCLKCTRL_CLKSEL_MASK) \
160 CMU->IADCCLKCTRL = (CMU->IADCCLKCTRL & ~_CMU_IADCCLKCTRL_CLKSEL_MASK) \
169 CMU->EM01GRPACLKCTRL = (CMU->EM01GRPACLKCTRL & ~_CMU_EM01GRPACLKCTRL_CLKSEL_MASK) \
195 CMU->EM01GRPACLKCTRL = (CMU->EM01GRPACLKCTRL & ~_CMU_EM01GRPACLKCTRL_CLKSEL_MASK) \
[all …]
Dem_chip.h220 clkEn = CMU->HFBUSCLKEN0; in CHIP_Init()
221 CMU->HFBUSCLKEN0 = clkEn | CMU_HFBUSCLKEN0_GPIO; in CHIP_Init()
229 CMU->HFBUSCLKEN0 = clkEn; in CHIP_Init()
235 CMU->HFXOSTARTUPCTRL = in CHIP_Init()
236 (CMU->HFXOSTARTUPCTRL & ~_CMU_HFXOSTARTUPCTRL_IBTRIMXOCORE_MASK) in CHIP_Init()
267 CMU->LFRCOCTRL = (CMU->LFRCOCTRL & ~_CMU_LFRCOCTRL_VREFUPDATE_MASK) in CHIP_Init()
293 CMU->HFBUSCLKEN0 |= CMU_HFBUSCLKEN0_LE; in CHIP_Init()
294 CMU->LFACLKEN0 |= CMU_LFACLKEN0_LCD; in CHIP_Init()
296 CMU->LFACLKEN0 &= ~CMU_LFACLKEN0_LCD; in CHIP_Init()
297 CMU->HFBUSCLKEN0 &= ~CMU_HFBUSCLKEN0_LE; in CHIP_Init()
[all …]
Dem_rtcc.h769 uint32_t lfeReg = CMU->LFECLKEN0; in RTCC_Lock()
770 bool cmuLocked = (CMU->LOCK == CMU_LOCK_LOCKKEY_LOCKED); in RTCC_Lock()
772 CMU->LOCK = CMU_LOCK_LOCKKEY_UNLOCK; in RTCC_Lock()
774 CMU->LFECLKEN0 = 0x0; in RTCC_Lock()
779 CMU->LFECLKEN0 = lfeReg; in RTCC_Lock()
781 CMU->LOCK = CMU_LOCK_LOCKKEY_LOCK; in RTCC_Lock()
956 uint32_t lfeReg = CMU->LFECLKEN0; in RTCC_Unlock()
957 bool cmuLocked = (CMU->LOCK == CMU_LOCK_LOCKKEY_LOCKED); in RTCC_Unlock()
959 CMU->LOCK = CMU_LOCK_LOCKKEY_UNLOCK; in RTCC_Unlock()
961 CMU->LFECLKEN0 = 0x0; in RTCC_Unlock()
[all …]
/hal_silabs-latest/simplicity_sdk/platform/emlib/src/
Dem_cmu.c342 uint32_t calCtrl = CMU->CALCTRL in CMU_CalibrateConfig()
357 CMU->CALTOP = downCycles << _CMU_CALTOP_CALTOP_SHIFT; in CMU_CalibrateConfig()
458 CMU->CALCTRL = calCtrl; in CMU_CalibrateConfig()
479 if ((CMU->CALCTRL & CMU_CALCTRL_CONT) == 0UL) { in CMU_CalibrateCountGet()
481 while ((CMU->STATUS & CMU_STATUS_CALRDY) == 0UL) { in CMU_CalibrateCountGet()
484 return CMU->CALCNT; in CMU_CalibrateCountGet()
595 CMU->EXPORTCLKCTRL = (CMU->EXPORTCLKCTRL & ~mask) | tmp; in CMU_ClkOutPinConfig()
635 ret = (CMU->SYSCLKCTRL & _CMU_SYSCLKCTRL_HCLKPRESC_MASK) in CMU_ClockDivGet()
655 ret = (CMU->TRACECLKCTRL & _CMU_TRACECLKCTRL_PRESC_MASK) in CMU_ClockDivGet()
670 ret = (CMU->EXPORTCLKCTRL & _CMU_EXPORTCLKCTRL_PRESC_MASK) in CMU_ClockDivGet()
[all …]
Dem_se.c321 bool sysCfgClkWasEnabled = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) != 0); in SE_executeCommand()
322 CMU->CLKEN0_SET = CMU_CLKEN0_SYSCFG; in SE_executeCommand()
334 CMU->CLKEN0_CLR = CMU_CLKEN0_SYSCFG; in SE_executeCommand()
395 bool sysCfgClkWasEnabled = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) != 0); in rootIsOutputMailboxValid()
396 CMU->CLKEN0_SET = CMU_CLKEN0_SYSCFG; in rootIsOutputMailboxValid()
404 CMU->CLKEN0_CLR = CMU_CLKEN0_SYSCFG; in rootIsOutputMailboxValid()
449 bool sysCfgClkWasEnabled = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) != 0); in SE_getVersion()
450 CMU->CLKEN0_SET = CMU_CLKEN0_SYSCFG; in SE_getVersion()
453 CMU->CLKEN0_CLR = CMU_CLKEN0_SYSCFG; in SE_getVersion()
508 bool sysCfgClkWasEnabled = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) != 0); in SE_getConfigStatusBits()
[all …]
Dem_emu.c418 cmuStatus = CMU->STATUS; in emState()
425 hfrcoCtrl = CMU->HFRCOCTRL; in emState()
442 cmuLocked = CMU->LOCK & CMU_LOCK_LOCKKEY_LOCKED; in emState()
465 CMU->OSCENCMD = oscEnCmd; in emState()
473 while ((CMU->SYNCBUSY & CMU_SYNCBUSY_HFRCOBSY) != 0U) { in emState()
475 CMU->HFRCOCTRL = hfrcoCtrl; in emState()
520 CMU->OSCENCMD = CMU_OSCENCMD_HFRCODIS; in emState()
691 uint32_t freqRange = (CMU->HFRCOCTRL & _CMU_HFRCOCTRL_FREQRANGE_MASK) in vScaleAfterWakeup()
730 CMU->CLKEN0_SET = CMU_CLKEN0_DPLL0; in dpllState()
733 dpllRefClk = CMU->DPLLREFCLKCTRL; in dpllState()
[all …]
/hal_silabs-latest/gecko/emlib/src/
Dem_cmu.c339 uint32_t calCtrl = CMU->CALCTRL in CMU_CalibrateConfig()
354 CMU->CALTOP = downCycles << _CMU_CALTOP_CALTOP_SHIFT; in CMU_CalibrateConfig()
455 CMU->CALCTRL = calCtrl; in CMU_CalibrateConfig()
476 if ((CMU->CALCTRL & CMU_CALCTRL_CONT) == 0UL) { in CMU_CalibrateCountGet()
478 while ((CMU->STATUS & CMU_STATUS_CALRDY) == 0UL) { in CMU_CalibrateCountGet()
481 return CMU->CALCNT; in CMU_CalibrateCountGet()
592 CMU->EXPORTCLKCTRL = (CMU->EXPORTCLKCTRL & ~mask) | tmp; in CMU_ClkOutPinConfig()
632 ret = (CMU->SYSCLKCTRL & _CMU_SYSCLKCTRL_HCLKPRESC_MASK) in CMU_ClockDivGet()
652 ret = (CMU->TRACECLKCTRL & _CMU_TRACECLKCTRL_PRESC_MASK) in CMU_ClockDivGet()
667 ret = (CMU->EXPORTCLKCTRL & _CMU_EXPORTCLKCTRL_PRESC_MASK) in CMU_ClockDivGet()
[all …]
Dem_se.c314 bool sysCfgClkWasEnabled = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) != 0); in SE_executeCommand()
315 CMU->CLKEN0_SET = CMU_CLKEN0_SYSCFG; in SE_executeCommand()
327 CMU->CLKEN0_CLR = CMU_CLKEN0_SYSCFG; in SE_executeCommand()
388 bool sysCfgClkWasEnabled = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) != 0); in rootIsOutputMailboxValid()
389 CMU->CLKEN0_SET = CMU_CLKEN0_SYSCFG; in rootIsOutputMailboxValid()
397 CMU->CLKEN0_CLR = CMU_CLKEN0_SYSCFG; in rootIsOutputMailboxValid()
442 bool sysCfgClkWasEnabled = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) != 0); in SE_getVersion()
443 CMU->CLKEN0_SET = CMU_CLKEN0_SYSCFG; in SE_getVersion()
446 CMU->CLKEN0_CLR = CMU_CLKEN0_SYSCFG; in SE_getVersion()
501 bool sysCfgClkWasEnabled = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) != 0); in SE_getConfigStatusBits()
[all …]
/hal_silabs-latest/simplicity_sdk/platform/service/power_manager/src/sleep_loop/
Dsl_power_manager_hal_s2.c189 cmu_sys_clock_register = CMU->SYSCLKCTRL & _CMU_SYSCLKCTRL_CLKSEL_MASK; in sli_power_manager_init_hardware()
191 cmu_dpll_ref_clock_register = CMU->DPLLREFCLKCTRL & _CMU_DPLLREFCLKCTRL_CLKSEL_MASK; in sli_power_manager_init_hardware()
195 CMU->CLKEN0_SET = CMU_CLKEN0_HFXO0; in sli_power_manager_init_hardware()
197 CMU->CLKEN0_SET = CMU_CLKEN0_DPLL0; in sli_power_manager_init_hardware()
203 …|| ((CMU->EM01GRPACLKCTRL & _CMU_EM01GRPACLKCTRL_CLKSEL_MASK) == CMU_EM01GRPACLKCTRL_CLKSEL_HFXO)); in sli_power_manager_init_hardware()
206 …is_hf_x_oscillator_used = is_hf_x_oscillator_used || ((CMU->RADIOCLKCTRL & _CMU_RADIOCLKCTRL_EN_MA… in sli_power_manager_init_hardware()
210 …is_hf_x_oscillator_used = is_hf_x_oscillator_used || ((CMU->EM01GRPBCLKCTRL & _CMU_EM01GRPBCLKCTRL… in sli_power_manager_init_hardware()
214 …is_hf_x_oscillator_used = is_hf_x_oscillator_used || ((CMU->EM01GRPCCLKCTRL & _CMU_EM01GRPCCLKCTRL… in sli_power_manager_init_hardware()
227 …is_hf_x_oscillator_used = is_hf_x_oscillator_used || ((CMU->DPLLREFCLKCTRL & _CMU_DPLLREFCLKCTRL_C… in sli_power_manager_init_hardware()
234 switch (CMU->DPLLREFCLKCTRL & _CMU_DPLLREFCLKCTRL_CLKSEL_MASK) { in sli_power_manager_init_hardware()
[all …]
Dsl_power_manager_hal_sixg301.c60 …sysclk_prescalers_value = (CMU->SYSCLKCTRL & (_CMU_SYSCLKCTRL_HCLKPRESC_MASK | _CMU_SYSCLKCTRL_PCL… in sli_power_manager_init_hardware()
125 …CMU->SYSCLKCTRL = (CMU->SYSCLKCTRL & ~(_CMU_SYSCLKCTRL_HCLKPRESC_MASK | _CMU_SYSCLKCTRL_PCLKPRESC_… in sli_power_manager_apply_em()
130 …CMU->SYSCLKCTRL = (CMU->SYSCLKCTRL & ~(_CMU_SYSCLKCTRL_HCLKPRESC_MASK | _CMU_SYSCLKCTRL_PCLKPRESC_… in sli_power_manager_apply_em()
/hal_silabs-latest/simplicity_sdk/platform/service/sleeptimer/src/
Dsl_sleeptimer_hal_prortc.c93 uint32_t cmu_status = CMU->STATUS; in sleeptimer_hal_init_timer()
107 CMU->LFRCLKSEL = (CMU->LFRCLKSEL & ~_CMU_LFRCLKSEL_LFR_MASK) in sleeptimer_hal_init_timer()
111 CMU->LFRCLKEN0 |= 1 << _CMU_LFRCLKEN0_PRORTC_SHIFT; in sleeptimer_hal_init_timer()
124 CMU->RADIOCLKCTRL = CMU_RADIOCLKCTRL_EN; in sleeptimer_hal_init_timer()
127 CMU->CLKEN1_SET = CMU_CLKEN1_PRORTC; in sleeptimer_hal_init_timer()
131 uint32_t enabled_clocks = CMU->CLKEN0; in sleeptimer_hal_init_timer()
145 CMU->PRORTCCLKCTRL = CMU_PRORTCCLKCTRL_CLKSEL_LFXO; in sleeptimer_hal_init_timer()
147 CMU->PRORTCCLKCTRL = CMU_PRORTCCLKCTRL_CLKSEL_LFRCO; in sleeptimer_hal_init_timer()
386 lfr_clk_sel = (CMU->LFRCLKSEL & _CMU_LFRCLKSEL_LFR_MASK) << _CMU_LFRCLKSEL_LFR_SHIFT; in sleeptimer_hal_get_timer_frequency()
405 freq >>= (CMU->LFRPRESC0 & _CMU_LFRPRESC0_PRORTC_MASK) in sleeptimer_hal_get_timer_frequency()
[all …]
/hal_silabs-latest/simplicity_sdk/platform/service/device_init/src/
Dsl_device_init_lfrco.c47 CMU->LFRCOCTRL &= ~(CMU_LFRCOCTRL_ENVREF); in sl_device_init_lfrco()
49 CMU->LFRCOCTRL |= CMU_LFRCOCTRL_ENVREF; in sl_device_init_lfrco()
53 CMU->LFRCOCTRL &= ~(CMU_LFRCOCTRL_ENCHOP); in sl_device_init_lfrco()
55 CMU->LFRCOCTRL |= CMU_LFRCOCTRL_ENCHOP; in sl_device_init_lfrco()
59 CMU->LFRCOCTRL &= ~(CMU_LFRCOCTRL_ENDEM); in sl_device_init_lfrco()
61 CMU->LFRCOCTRL |= CMU_LFRCOCTRL_ENDEM; in sl_device_init_lfrco()
/hal_silabs-latest/simplicity_sdk/platform/service/clock_manager/src/
Dsl_clock_manager_hal_s2.c521 reg = &CMU->CLKEN0; in sli_clock_manager_hal_enable_bus_clock()
523 reg = &CMU->CLKEN1; in sli_clock_manager_hal_enable_bus_clock()
526 reg = &CMU->CLKEN2; in sli_clock_manager_hal_enable_bus_clock()
909 if ((CMU->CALCTRL & CMU_CALCTRL_CONT) == 0UL) { in sli_clock_manager_hal_wait_rco_calibration()
911 while ((CMU->STATUS & CMU_STATUS_CALRDY) == 0UL) ; in sli_clock_manager_hal_wait_rco_calibration()
920 *count = CMU->CALCNT; in sli_clock_manager_hal_get_rco_calibration_count()
938 … CMU->SYSCLKCTRL = (CMU->SYSCLKCTRL & ~_CMU_SYSCLKCTRL_CLKSEL_MASK) | CMU_SYSCLKCTRL_CLKSEL_FSRCO; in sli_clock_manager_hal_set_sysclk_source()
943 … CMU->SYSCLKCTRL = (CMU->SYSCLKCTRL & ~_CMU_SYSCLKCTRL_CLKSEL_MASK) | CMU_SYSCLKCTRL_CLKSEL_HFXO; in sli_clock_manager_hal_set_sysclk_source()
948 …CMU->SYSCLKCTRL = (CMU->SYSCLKCTRL & ~_CMU_SYSCLKCTRL_CLKSEL_MASK) | CMU_SYSCLKCTRL_CLKSEL_HFRCODP… in sli_clock_manager_hal_set_sysclk_source()
954 …CMU->SYSCLKCTRL = (CMU->SYSCLKCTRL & ~_CMU_SYSCLKCTRL_CLKSEL_MASK) | CMU_SYSCLKCTRL_CLKSEL_RFFPLL0… in sli_clock_manager_hal_set_sysclk_source()
[all …]
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32HG/Source/
Dsystem_efm32hg.c123 ret >>= (CMU->HFCORECLKDIV & _CMU_HFCORECLKDIV_HFCORECLKDIV_MASK) in SystemCoreClockGet()
165 switch (CMU->STATUS & (CMU_STATUS_HFRCOSEL | CMU_STATUS_HFXOSEL in SystemHFClockGet()
202 switch (CMU->HFRCOCTRL & _CMU_HFRCOCTRL_BAND_MASK) { in SystemHFClockGet()
230 return ret / (1U + ((CMU->CTRL & _CMU_CTRL_HFCLKDIV_MASK) in SystemHFClockGet()
276 if ((CMU->STATUS & CMU_STATUS_HFXOSEL) != 0U) { in SystemHFXOClockSet()
380 if ((CMU->STATUS & CMU_STATUS_LFXOSEL) != 0U) { in SystemLFXOClockSet()
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG11B/Source/
Dsystem_efm32gg11b.c142 presc = (CMU->HFCOREPRESC & _CMU_HFCOREPRESC_PRESC_MASK) in SystemCoreClockGet()
185 switch (CMU->HFCLKSTATUS & _CMU_HFCLKSTATUS_SELECTED_MASK) { in SystemHFClockGet()
211 switch ((CMU->USHFRCOCTRL & _CMU_USHFRCOCTRL_FREQRANGE_MASK) in SystemHFClockGet()
240 return ret / (1U + ((CMU->HFPRESC & _CMU_HFPRESC_PRESC_MASK) in SystemHFClockGet()
286 if ((CMU->HFCLKSTATUS & _CMU_HFCLKSTATUS_SELECTED_MASK) in SystemHFXOClockSet()
401 if ((CMU->HFCLKSTATUS & _CMU_HFCLKSTATUS_SELECTED_MASK) in SystemLFXOClockSet()
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32WG/Source/
Dsystem_efm32wg.c130 ret >>= (CMU->HFCORECLKDIV & _CMU_HFCORECLKDIV_HFCORECLKDIV_MASK) in SystemCoreClockGet()
172 switch (CMU->STATUS & (CMU_STATUS_HFRCOSEL | CMU_STATUS_HFXOSEL in SystemHFClockGet()
199 switch (CMU->HFRCOCTRL & _CMU_HFRCOCTRL_BAND_MASK) { in SystemHFClockGet()
239 return ret / (1U + ((CMU->CTRL & _CMU_CTRL_HFCLKDIV_MASK) in SystemHFClockGet()
285 if ((CMU->STATUS & CMU_STATUS_HFXOSEL) != 0U) { in SystemHFXOClockSet()
399 if ((CMU->STATUS & CMU_STATUS_LFXOSEL) != 0U) { in SystemLFXOClockSet()
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG12B/Source/
Dsystem_efm32gg12b.c147 presc = (CMU->HFCOREPRESC & _CMU_HFCOREPRESC_PRESC_MASK) in SystemCoreClockGet()
190 switch (CMU->HFCLKSTATUS & _CMU_HFCLKSTATUS_SELECTED_MASK) { in SystemHFClockGet()
216 switch ((CMU->USHFRCOCTRL & _CMU_USHFRCOCTRL_FREQRANGE_MASK) in SystemHFClockGet()
245 return ret / (1U + ((CMU->HFPRESC & _CMU_HFPRESC_PRESC_MASK) in SystemHFClockGet()
291 if ((CMU->HFCLKSTATUS & _CMU_HFCLKSTATUS_SELECTED_MASK) in SystemHFXOClockSet()
406 if ((CMU->HFCLKSTATUS & _CMU_HFCLKSTATUS_SELECTED_MASK) in SystemLFXOClockSet()
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32MG12P/Source/
Dsystem_efr32mg12p.c142 presc = (CMU->HFCOREPRESC & _CMU_HFCOREPRESC_PRESC_MASK) in SystemCoreClockGet()
185 switch (CMU->HFCLKSTATUS & _CMU_HFCLKSTATUS_SELECTED_MASK) { in SystemHFClockGet()
219 return ret / (1U + ((CMU->HFPRESC & _CMU_HFPRESC_PRESC_MASK) in SystemHFClockGet()
265 if ((CMU->HFCLKSTATUS & _CMU_HFCLKSTATUS_SELECTED_MASK) in SystemHFXOClockSet()
380 if ((CMU->HFCLKSTATUS & _CMU_HFCLKSTATUS_SELECTED_MASK) in SystemLFXOClockSet()
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32BG13P/Source/
Dsystem_efr32bg13p.c142 presc = (CMU->HFCOREPRESC & _CMU_HFCOREPRESC_PRESC_MASK) in SystemCoreClockGet()
185 switch (CMU->HFCLKSTATUS & _CMU_HFCLKSTATUS_SELECTED_MASK) { in SystemHFClockGet()
219 return ret / (1U + ((CMU->HFPRESC & _CMU_HFPRESC_PRESC_MASK) in SystemHFClockGet()
265 if ((CMU->HFCLKSTATUS & _CMU_HFCLKSTATUS_SELECTED_MASK) in SystemHFXOClockSet()
380 if ((CMU->HFCLKSTATUS & _CMU_HFCLKSTATUS_SELECTED_MASK) in SystemLFXOClockSet()
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG13P/Source/
Dsystem_efr32fg13p.c142 presc = (CMU->HFCOREPRESC & _CMU_HFCOREPRESC_PRESC_MASK) in SystemCoreClockGet()
185 switch (CMU->HFCLKSTATUS & _CMU_HFCLKSTATUS_SELECTED_MASK) { in SystemHFClockGet()
219 return ret / (1U + ((CMU->HFPRESC & _CMU_HFPRESC_PRESC_MASK) in SystemHFClockGet()
265 if ((CMU->HFCLKSTATUS & _CMU_HFCLKSTATUS_SELECTED_MASK) in SystemHFXOClockSet()
380 if ((CMU->HFCLKSTATUS & _CMU_HFCLKSTATUS_SELECTED_MASK) in SystemLFXOClockSet()
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG12B/Source/
Dsystem_efm32pg12b.c142 presc = (CMU->HFCOREPRESC & _CMU_HFCOREPRESC_PRESC_MASK) in SystemCoreClockGet()
185 switch (CMU->HFCLKSTATUS & _CMU_HFCLKSTATUS_SELECTED_MASK) { in SystemHFClockGet()
221 return ret / (1U + ((CMU->HFPRESC & _CMU_HFPRESC_PRESC_MASK) in SystemHFClockGet()
267 if ((CMU->HFCLKSTATUS & _CMU_HFCLKSTATUS_SELECTED_MASK) in SystemHFXOClockSet()
395 if ((CMU->HFCLKSTATUS & _CMU_HFCLKSTATUS_SELECTED_MASK) in SystemLFXOClockSet()
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG1P/Source/
Dsystem_efr32fg1p.c142 presc = (CMU->HFCOREPRESC & _CMU_HFCOREPRESC_PRESC_MASK) in SystemCoreClockGet()
185 switch (CMU->HFCLKSTATUS & _CMU_HFCLKSTATUS_SELECTED_MASK) { in SystemHFClockGet()
215 return ret / (1U + ((CMU->HFPRESC & _CMU_HFPRESC_PRESC_MASK) in SystemHFClockGet()
261 if ((CMU->HFCLKSTATUS & _CMU_HFCLKSTATUS_SELECTED_MASK) in SystemHFXOClockSet()
387 if ((CMU->HFCLKSTATUS & _CMU_HFCLKSTATUS_SELECTED_MASK) in SystemLFXOClockSet()

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