Searched refs:CLOCK_SWITCHED_FCLK_VAD_b (Results 1 – 2 of 2) sorted by relevance
680 while (pULPCLK->CLOCK_STAUS_REG_b.CLOCK_SWITCHED_FCLK_VAD_b != 1U) in ulpss_vad_clk_config()
13879 __IM unsigned int CLOCK_SWITCHED_FCLK_VAD_b : 1; /*!< [10..10] Status of clock mux for member
