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Searched refs:CLK_CONFIG_REG4_b (Results 1 – 5 of 5) sorted by relevance

/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/systemlevel/src/
Drsi_ipmu.c1618 M4CLK->CLK_CONFIG_REG4_b.SLEEP_CLK_SEL = khz_rc_clk; in RSI_Clks_Calibration()
1621 M4CLK->CLK_CONFIG_REG4_b.SLEEP_CLK_SEL = khz_ro_clk; in RSI_Clks_Calibration()
1624 M4CLK->CLK_CONFIG_REG4_b.SLEEP_CLK_SEL = khz_xtal_clk; in RSI_Clks_Calibration()
Drsi_pll.c1724 pCLK->CLK_CONFIG_REG4_b.CCI_CLK_SEL = 0x00; in clk_cci_clk_config()
1732 pCLK->CLK_CONFIG_REG4_b.CCI_CLK_SEL = 0x01; in clk_cci_clk_config()
2331 pCLK->CLK_CONFIG_REG4_b.SLEEP_CLK_SEL = clkSrc; in clk_slp_clk_config()
2338 pCLK->CLK_CONFIG_REG4_b.SLEEP_CLK_SEL = clkSrc; in clk_slp_clk_config()
2343 pCLK->CLK_CONFIG_REG4_b.SLEEP_CLK_SEL = clkSrc; in clk_slp_clk_config()
2349 pCLK->CLK_CONFIG_REG4_b.SLEEP_CLK_SEL = clkSrc; in clk_slp_clk_config()
Drsi_ulpss_clk.c55 pCLK->CLK_CONFIG_REG4_b.ULPSS_CLK_DIV_FAC = (unsigned int)(divFactor & 0x3F); in ulpss_clock_config()
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/
Dclock_update.c356 src_clk_mux = M4CLK->CLK_CONFIG_REG4_b.CCI_CLK_SEL; in RSI_CLK_GetBaseClock()
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/core/chip/inc/
Dsi91x_device.h10637 } CLK_CONFIG_REG4_b; member