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Searched refs:CLKEN0 (Results 1 – 23 of 23) sorted by relevance

/hal_silabs-latest/simplicity_sdk/platform/emlib/src/
Dem_se.c321 bool sysCfgClkWasEnabled = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) != 0); in SE_executeCommand()
395 bool sysCfgClkWasEnabled = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) != 0); in rootIsOutputMailboxValid()
449 bool sysCfgClkWasEnabled = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) != 0); in SE_getVersion()
508 bool sysCfgClkWasEnabled = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) != 0); in SE_getConfigStatusBits()
547 bool sysCfgClkWasEnabled = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) != 0); in SE_getOTPVersion()
585 bool sysCfgClkWasEnabled = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) != 0); in SE_isCommandCompleted()
614 bool sysCfgClkWasEnabled = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) != 0); in SE_readExecutedCommand()
651 bool sysCfgClkWasEnabled = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) != 0); in SE_readCommandResponse()
699 bool sysCfgClkWasEnabled = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) != 0); in SE_ackCommand()
Dem_emu.c1024 if (CMU->CLKEN0 & CMU_CLKEN0_GPIO) { in EMU_EnterEM2()
1236 if (CMU->CLKEN0 & CMU_CLKEN0_GPIO) { in EMU_EnterEM3()
1568 if (CMU->CLKEN0 & CMU_CLKEN0_GPIO) { in EMU_EnterEM4()
3394 dcdcClkWasEnabled = ((CMU->CLKEN0 & CMU_CLKEN0_DCDC) != 0); in EMU_EM01BoostPeakCurrentSet()
3651 dcdcClkWasEnabled = ((CMU->CLKEN0 & CMU_CLKEN0_DCDC) != 0); in EMU_EM01PeakCurrentSet()
3712 dcdcClkWasEnabled = ((CMU->CLKEN0 & CMU_CLKEN0_DCDC) != 0); in EMU_DCDCSetPFMXModePeakCurrent()
3751 dcdcClkWasEnabled = ((CMU->CLKEN0 & CMU_CLKEN0_DCDC) != 0); in EMU_DCDCSetPFMXTimeoutMaxCtrl()
Dem_cmu.c823 reg = &CMU->CLKEN0; in CMU_ClockEnable()
1510 bool syscfgClkIsOff = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) == 0); in sli_em_cmu_SYSTICEXTCLKENSet()
1534 bool syscfgClkIsOff = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) == 0); in sli_em_cmu_SYSTICEXTCLKENClear()
1763 syscfgClkIsOff = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) == 0); in CMU_ClockSelectSet()
1776 syscfgClkIsOff = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) == 0); in CMU_ClockSelectSet()
Dem_msc.c1999 if (!(CMU->CLKEN0 & _CMU_CLKEN0_SYSCFG_MASK)) { in MSC_DmemPortMapSet()
/hal_silabs-latest/gecko/emlib/src/
Dem_se.c314 bool sysCfgClkWasEnabled = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) != 0); in SE_executeCommand()
388 bool sysCfgClkWasEnabled = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) != 0); in rootIsOutputMailboxValid()
442 bool sysCfgClkWasEnabled = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) != 0); in SE_getVersion()
501 bool sysCfgClkWasEnabled = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) != 0); in SE_getConfigStatusBits()
540 bool sysCfgClkWasEnabled = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) != 0); in SE_getOTPVersion()
578 bool sysCfgClkWasEnabled = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) != 0); in SE_isCommandCompleted()
607 bool sysCfgClkWasEnabled = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) != 0); in SE_readExecutedCommand()
644 bool sysCfgClkWasEnabled = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) != 0); in SE_readCommandResponse()
692 bool sysCfgClkWasEnabled = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) != 0); in SE_ackCommand()
Dem_emu.c3333 dcdcClkWasEnabled = ((CMU->CLKEN0 & CMU_CLKEN0_DCDC) != 0); in EMU_EM01BoostPeakCurrentSet()
3556 dcdcClkWasEnabled = ((CMU->CLKEN0 & CMU_CLKEN0_DCDC) != 0); in EMU_EM01PeakCurrentSet()
3617 dcdcClkWasEnabled = ((CMU->CLKEN0 & CMU_CLKEN0_DCDC) != 0); in EMU_DCDCSetPFMXModePeakCurrent()
3656 dcdcClkWasEnabled = ((CMU->CLKEN0 & CMU_CLKEN0_DCDC) != 0); in EMU_DCDCSetPFMXTimeoutMaxCtrl()
Dem_cmu.c817 reg = &CMU->CLKEN0; in CMU_ClockEnable()
1486 bool syscfgClkIsOff = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) == 0); in sli_em_cmu_SYSTICEXTCLKENSet()
1510 bool syscfgClkIsOff = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) == 0); in sli_em_cmu_SYSTICEXTCLKENClear()
1738 syscfgClkIsOff = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) == 0); in CMU_ClockSelectSet()
1751 syscfgClkIsOff = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) == 0); in CMU_ClockSelectSet()
Dem_msc.c1993 if (!(CMU->CLKEN0 & _CMU_CLKEN0_SYSCFG_MASK)) { in MSC_DmemPortMapSet()
/hal_silabs-latest/gecko/emlib/inc/
Dem_chip.h349 bool hfrcoClkIsOff = (CMU->CLKEN0 & CMU_CLKEN0_HFRCO0) == 0; in CHIP_Init()
362 bool syscfgClkIsOff = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) == 0); in CHIP_Init()
365 bool dcdcClkIsOff = ((CMU->CLKEN0 & CMU_CLKEN0_DCDC) == 0); in CHIP_Init()
402 bool hfxo0ClkIsOff = (CMU->CLKEN0 & CMU_CLKEN0_HFXO0) == 0; in CHIP_Init()
/hal_silabs-latest/simplicity_sdk/platform/emlib/inc/
Dem_chip.h353 bool hfrcoClkIsOff = (CMU->CLKEN0 & CMU_CLKEN0_HFRCO0) == 0; in CHIP_Init()
366 bool syscfgClkIsOff = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) == 0); in CHIP_Init()
369 bool dcdcClkIsOff = ((CMU->CLKEN0 & CMU_CLKEN0_DCDC) == 0); in CHIP_Init()
406 bool hfxo0ClkIsOff = (CMU->CLKEN0 & CMU_CLKEN0_HFXO0) == 0; in CHIP_Init()
/hal_silabs-latest/simplicity_sdk/platform/security/sl_component/se_manager/src/
Dsli_se_manager_mailbox.c167 bool sys_cfg_clk_enabled = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) != 0); in get_root_mailbox_output()
306 bool sysCfgClkWasEnabled = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) != 0); in sli_se_mailbox_execute_command()
Dsl_se_manager_util.c399 bool syscfg_clock_was_enabled = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) != 0); in sl_se_get_se_version()
/hal_silabs-latest/simplicity_sdk/platform/security/sl_component/sl_protocol_crypto/src/
Dsli_radioaes_management.c128 CMU->CLKEN0 |= CMU_CLKEN0_RADIOAES; in sli_radioaes_acquire()
/hal_silabs-latest/simplicity_sdk/platform/service/power_manager/src/common/
Dsl_power_manager_em4.c59 #define WDOG0_CLOCK_ENABLED_BIT (CMU->CLKEN0 & CMU_CLKEN0_WDOG0)
/hal_silabs-latest/simplicity_sdk/platform/service/sleeptimer/src/
Dsl_sleeptimer_hal_prortc.c131 uint32_t enabled_clocks = CMU->CLKEN0; in sleeptimer_hal_init_timer()
/hal_silabs-latest/simplicity_sdk/platform/service/clock_manager/src/
Dsl_clock_manager_hal_s2.c521 reg = &CMU->CLKEN0; in sli_clock_manager_hal_enable_bus_clock()
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG27/Include/
Defr32bg27_cmu.h60 …__IOM uint32_t CLKEN0; /**< Clock Enable Register 0 … member
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG22/Include/
Defr32bg22_cmu.h60 …__IOM uint32_t CLKEN0; /**< Clock Enable Register 0 … member
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG29/Include/
Defr32mg29_cmu.h60 …__IOM uint32_t CLKEN0; /**< Clock Enable Register 0 … member
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG29/Include/
Defr32bg29_cmu.h60 …__IOM uint32_t CLKEN0; /**< Clock Enable Register 0 … member
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32FG23/Include/
Defr32fg23_cmu.h60 …__IOM uint32_t CLKEN0; /**< Clock Enable Register 0 … member
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG24/Include/
Defr32mg24_cmu.h60 …__IOM uint32_t CLKEN0; /**< Clock Enable Register 0 … member
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32ZG23/Include/
Defr32zg23_cmu.h60 …__IOM uint32_t CLKEN0; /**< Clock Enable Register 0 … member