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Searched refs:CHEN (Results 1 – 25 of 35) sorted by relevance

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/hal_silabs-latest/simplicity_sdk/platform/emlib/src/
Dem_ldma.c87 LDMA->CHEN = 0; in LDMA_DeInit()
177 LDMA->CHEN = 0; in LDMA_Init()
381 BUS_RegMaskedClear(&LDMA->CHEN, chMask); in LDMA_StopTransfer()
411 if (((LDMA->CHEN & chMask) == 0) && ((LDMA->CHDONE & chMask) == chMask)) { in LDMA_TransferDone()
Dem_lesense.c778 BUS_RegBitWrite(&LESENSE->CHEN, chIdx, confCh->enaScanCh); in LESENSE_ChannelConfig()
911 BUS_RegBitWrite(&LESENSE->CHEN, chIdx, enaScanCh); in LESENSE_ChannelEnable()
939 LESENSE->CHEN = chMask; in LESENSE_ChannelEnableMask()
1692 LESENSE->CHEN = _LESENSE_CHEN_RESETVALUE; in LESENSE_Reset()
Dem_msc.c1476 LDMA->CHEN |= (0x1 << ch); in MSC_WriteWordDma()
1483 BUS_RegMaskedClear(&LDMA->CHEN, (0x1 << ch)); in MSC_WriteWordDma()
1759 LDMA->CHEN = 0;
1792 ((LDMA->CHEN & chMask) == 0)
/hal_silabs-latest/gecko/emlib/src/
Dem_ldma.c87 LDMA->CHEN = 0; in LDMA_DeInit()
191 LDMA->CHEN = 0; in LDMA_Init()
417 BUS_RegMaskedClear(&LDMA->CHEN, chMask); in LDMA_StopTransfer()
447 if (((LDMA->CHEN & chMask) == 0) && ((LDMA->CHDONE & chMask) == chMask)) { in LDMA_TransferDone()
Dem_lesense.c778 BUS_RegBitWrite(&LESENSE->CHEN, chIdx, confCh->enaScanCh); in LESENSE_ChannelConfig()
911 BUS_RegBitWrite(&LESENSE->CHEN, chIdx, enaScanCh); in LESENSE_ChannelEnable()
939 LESENSE->CHEN = chMask; in LESENSE_ChannelEnableMask()
1692 LESENSE->CHEN = _LESENSE_CHEN_RESETVALUE; in LESENSE_Reset()
Dem_msc.c1474 LDMA->CHEN |= (0x1 << ch); in MSC_WriteWordDma()
1481 BUS_RegMaskedClear(&LDMA->CHEN, (0x1 << ch)); in MSC_WriteWordDma()
1754 LDMA->CHEN = 0;
1787 ((LDMA->CHEN & chMask) == 0)
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG1P/Include/
Defr32fg1p_ldma.h52 __IOM uint32_t CHEN; /**< DMA Channel Enable Register (Single-Cycle RMW) */ member
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG1B/Include/
Defm32pg1b_ldma.h52 __IOM uint32_t CHEN; /**< DMA Channel Enable Register (Single-Cycle RMW) */ member
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_ldma.h52 __IOM uint32_t CHEN; /**< DMA Channel Enable Register (Single-Cycle RMW) */ member
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_ldma.h52 __IOM uint32_t CHEN; /**< DMA Channel Enable Register (Single-Cycle RMW) */ member
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_ldma.h52 __IOM uint32_t CHEN; /**< DMA Channel Enable Register (Single-Cycle RMW) */ member
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_ldma.h52 __IOM uint32_t CHEN; /**< DMA Channel Enable Register (Single-Cycle RMW) */ member
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_ldma.h52 __IOM uint32_t CHEN; /**< DMA Channel Enable Register (Single-Cycle RMW) */ member
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32FG23/Include/
Defr32fg23_ldma.h67 …__IOM uint32_t CHEN; /**< DMA Channel Enable Register … member
Defr32fg23_lesense.h69 …__IOM uint32_t CHEN; /**< Channel enable … member
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG29/Include/
Defr32mg29_ldma.h67 …__IOM uint32_t CHEN; /**< DMA Channel Enable Register … member
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG24/Include/
Defr32mg24_ldma.h67 …__IOM uint32_t CHEN; /**< DMA Channel Enable Register … member
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG22/Include/
Defr32bg22_ldma.h67 …__IOM uint32_t CHEN; /**< DMA Channel Enable Register … member
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32ZG23/Include/
Defr32zg23_ldma.h67 …__IOM uint32_t CHEN; /**< DMA Channel Enable Register … member
Defr32zg23_lesense.h69 …__IOM uint32_t CHEN; /**< Channel enable … member
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG21/Include/
Defr32mg21_ldma.h67 …__IOM uint32_t CHEN; /**< DMA Channel Enable Register … member
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_ldma.h52 __IOM uint32_t CHEN; /**< DMA Channel Enable Register (Single-Cycle RMW) */ member
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG27/Include/
Defr32bg27_ldma.h67 …__IOM uint32_t CHEN; /**< DMA Channel Enable Register … member
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG29/Include/
Defr32bg29_ldma.h67 …__IOM uint32_t CHEN; /**< DMA Channel Enable Register … member
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_ldma.h52 __IOM uint32_t CHEN; /**< DMA Channel Enable Register (Single-Cycle RMW) */ member

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