/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32BG13P/Include/ |
D | efr32bg13p_smu.h | 197 #define _SMU_PPUPATD0_I2C1_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 198 #define SMU_PPUPATD0_I2C1_DEFAULT (_SMU_PPUPATD0_I2C1_DEFAULT << 19) /**< Shifted mode…
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/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32FG13P/Include/ |
D | efr32fg13p_smu.h | 197 #define _SMU_PPUPATD0_I2C1_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 198 #define SMU_PPUPATD0_I2C1_DEFAULT (_SMU_PPUPATD0_I2C1_DEFAULT << 19) /**< Shifted mode…
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/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32MG12P/Include/ |
D | efr32mg12p_smu.h | 197 #define _SMU_PPUPATD0_I2C1_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 198 #define SMU_PPUPATD0_I2C1_DEFAULT (_SMU_PPUPATD0_I2C1_DEFAULT << 19) /**< Shifted mode…
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/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32PG12B/Include/ |
D | efm32pg12b_smu.h | 197 #define _SMU_PPUPATD0_I2C1_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 198 #define SMU_PPUPATD0_I2C1_DEFAULT (_SMU_PPUPATD0_I2C1_DEFAULT << 19) /**< Shifted mode…
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/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32JG12B/Include/ |
D | efm32jg12b_smu.h | 197 #define _SMU_PPUPATD0_I2C1_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 198 #define SMU_PPUPATD0_I2C1_DEFAULT (_SMU_PPUPATD0_I2C1_DEFAULT << 19) /**< Shifted mode…
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/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/ |
D | efm32gg12b_smu.h | 218 #define _SMU_PPUPATD0_I2C1_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 219 #define SMU_PPUPATD0_I2C1_DEFAULT (_SMU_PPUPATD0_I2C1_DEFAULT << 19) /**< Shifted mode…
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D | efm32gg12b390f1024gl112.h | 7663 #define _SMU_PPUPATD0_I2C1_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 7664 #define SMU_PPUPATD0_I2C1_DEFAULT (_SMU_PPUPATD0_I2C1_DEFAULT << 19) /**< Shifted mode…
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D | efm32gg12b390f512gl112.h | 7663 #define _SMU_PPUPATD0_I2C1_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 7664 #define SMU_PPUPATD0_I2C1_DEFAULT (_SMU_PPUPATD0_I2C1_DEFAULT << 19) /**< Shifted mode…
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D | efm32gg12b110f1024gq64.h | 8440 #define _SMU_PPUPATD0_I2C1_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 8441 #define SMU_PPUPATD0_I2C1_DEFAULT (_SMU_PPUPATD0_I2C1_DEFAULT << 19) /**< Shifted mode…
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D | efm32gg12b110f1024gm64.h | 8440 #define _SMU_PPUPATD0_I2C1_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 8441 #define SMU_PPUPATD0_I2C1_DEFAULT (_SMU_PPUPATD0_I2C1_DEFAULT << 19) /**< Shifted mode…
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D | efm32gg12b110f1024iq64.h | 8440 #define _SMU_PPUPATD0_I2C1_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 8441 #define SMU_PPUPATD0_I2C1_DEFAULT (_SMU_PPUPATD0_I2C1_DEFAULT << 19) /**< Shifted mode…
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D | efm32gg12b530f512iq64.h | 8471 #define _SMU_PPUPATD0_I2C1_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 8472 #define SMU_PPUPATD0_I2C1_DEFAULT (_SMU_PPUPATD0_I2C1_DEFAULT << 19) /**< Shifted mode…
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D | efm32gg12b530f512il112.h | 8471 #define _SMU_PPUPATD0_I2C1_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 8472 #define SMU_PPUPATD0_I2C1_DEFAULT (_SMU_PPUPATD0_I2C1_DEFAULT << 19) /**< Shifted mode…
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D | efm32gg12b530f512il120.h | 8471 #define _SMU_PPUPATD0_I2C1_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 8472 #define SMU_PPUPATD0_I2C1_DEFAULT (_SMU_PPUPATD0_I2C1_DEFAULT << 19) /**< Shifted mode…
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D | efm32gg12b530f512im64.h | 8471 #define _SMU_PPUPATD0_I2C1_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 8472 #define SMU_PPUPATD0_I2C1_DEFAULT (_SMU_PPUPATD0_I2C1_DEFAULT << 19) /**< Shifted mode…
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D | efm32gg12b110f1024im64.h | 8440 #define _SMU_PPUPATD0_I2C1_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 8441 #define SMU_PPUPATD0_I2C1_DEFAULT (_SMU_PPUPATD0_I2C1_DEFAULT << 19) /**< Shifted mode…
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D | efm32gg12b530f512iq100.h | 8471 #define _SMU_PPUPATD0_I2C1_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 8472 #define SMU_PPUPATD0_I2C1_DEFAULT (_SMU_PPUPATD0_I2C1_DEFAULT << 19) /**< Shifted mode…
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D | efm32gg12b530f512gq100.h | 8471 #define _SMU_PPUPATD0_I2C1_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 8472 #define SMU_PPUPATD0_I2C1_DEFAULT (_SMU_PPUPATD0_I2C1_DEFAULT << 19) /**< Shifted mode…
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D | efm32gg12b530f512gq64.h | 8471 #define _SMU_PPUPATD0_I2C1_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 8472 #define SMU_PPUPATD0_I2C1_DEFAULT (_SMU_PPUPATD0_I2C1_DEFAULT << 19) /**< Shifted mode…
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D | efm32gg12b310f1024gl112.h | 8469 #define _SMU_PPUPATD0_I2C1_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 8470 #define SMU_PPUPATD0_I2C1_DEFAULT (_SMU_PPUPATD0_I2C1_DEFAULT << 19) /**< Shifted mode…
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/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/ |
D | efm32gg11b_smu.h | 228 #define _SMU_PPUPATD0_I2C1_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 229 #define SMU_PPUPATD0_I2C1_DEFAULT (_SMU_PPUPATD0_I2C1_DEFAULT << 21) /**< Shifted mode…
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/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32MG21/Include/ |
D | efr32mg21_smu.h | 417 #define _SMU_PPUPATD0_I2C1_DEFAULT 0x00000000UL /**< M… macro 418 #define SMU_PPUPATD0_I2C1_DEFAULT (_SMU_PPUPATD0_I2C1_DEFAULT << 24) /**< S…
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/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32BG22/Include/ |
D | efr32bg22_smu.h | 417 #define _SMU_PPUPATD0_I2C1_DEFAULT 0x00000001UL /**< M… macro 418 #define SMU_PPUPATD0_I2C1_DEFAULT (_SMU_PPUPATD0_I2C1_DEFAULT << 24) /**< S…
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/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32BG27/Include/ |
D | efr32bg27_smu.h | 417 #define _SMU_PPUPATD0_I2C1_DEFAULT 0x00000001UL /**< M… macro 418 #define SMU_PPUPATD0_I2C1_DEFAULT (_SMU_PPUPATD0_I2C1_DEFAULT << 24) /**< S…
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/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32MG24/Include/ |
D | efr32mg24_smu.h | 407 #define _SMU_PPUPATD0_I2C1_DEFAULT 0x00000001UL /**< Mo… macro 408 #define SMU_PPUPATD0_I2C1_DEFAULT (_SMU_PPUPATD0_I2C1_DEFAULT << 22) /**< Sh…
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