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Searched refs:_SMU_PPUFS_MASK (Results 1 – 25 of 73) sorted by relevance

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/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_smu.h306 #define _SMU_PPUFS_MASK 0x0000007FUL /**< Mask for SMU_P… macro
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_smu.h306 #define _SMU_PPUFS_MASK 0x0000007FUL /**< Mask for SMU_P… macro
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_smu.h321 #define _SMU_PPUFS_MASK 0x0000007FUL /**< Mask for SMU_P… macro
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_smu.h321 #define _SMU_PPUFS_MASK 0x0000007FUL /**< Mask for SMU_P… macro
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_smu.h321 #define _SMU_PPUFS_MASK 0x0000007FUL /**< Mask for SMU_P… macro
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_smu.h411 #define _SMU_PPUFS_MASK 0x0000007FUL /**< Mask for SMU_P… macro
Defm32gg12b390f1024gl112.h7846 #define _SMU_PPUFS_MASK 0x0000007FUL /**< Mask for SMU_P… macro
Defm32gg12b390f512gl112.h7846 #define _SMU_PPUFS_MASK 0x0000007FUL /**< Mask for SMU_P… macro
Defm32gg12b110f1024gq64.h8613 #define _SMU_PPUFS_MASK 0x0000007FUL /**< Mask for SMU_P… macro
Defm32gg12b110f1024gm64.h8613 #define _SMU_PPUFS_MASK 0x0000007FUL /**< Mask for SMU_P… macro
Defm32gg12b110f1024iq64.h8613 #define _SMU_PPUFS_MASK 0x0000007FUL /**< Mask for SMU_P… macro
Defm32gg12b530f512iq64.h8649 #define _SMU_PPUFS_MASK 0x0000007FUL /**< Mask for SMU_P… macro
Defm32gg12b530f512il112.h8649 #define _SMU_PPUFS_MASK 0x0000007FUL /**< Mask for SMU_P… macro
Defm32gg12b530f512il120.h8649 #define _SMU_PPUFS_MASK 0x0000007FUL /**< Mask for SMU_P… macro
Defm32gg12b530f512im64.h8649 #define _SMU_PPUFS_MASK 0x0000007FUL /**< Mask for SMU_P… macro
Defm32gg12b110f1024im64.h8613 #define _SMU_PPUFS_MASK 0x0000007FUL /**< Mask for SMU_P… macro
Defm32gg12b530f512iq100.h8649 #define _SMU_PPUFS_MASK 0x0000007FUL /**< Mask for SMU_P… macro
Defm32gg12b530f512gq100.h8649 #define _SMU_PPUFS_MASK 0x0000007FUL /**< Mask for SMU_P… macro
Defm32gg12b530f512gq64.h8649 #define _SMU_PPUFS_MASK 0x0000007FUL /**< Mask for SMU_P… macro
Defm32gg12b310f1024gl112.h8647 #define _SMU_PPUFS_MASK 0x0000007FUL /**< Mask for SMU_P… macro
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_smu.h451 #define _SMU_PPUFS_MASK 0x0000007FUL /**< Mask for SMU_P… macro
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32MG21/Include/
Defr32mg21_smu.h764 #define _SMU_PPUFS_MASK 0x000000FFUL /**< Mask… macro
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32BG22/Include/
Defr32bg22_smu.h774 #define _SMU_PPUFS_MASK 0x000000FFUL /**< Mask… macro
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32BG27/Include/
Defr32bg27_smu.h804 #define _SMU_PPUFS_MASK 0x000000FFUL /**< Mask… macro
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32MG24/Include/
Defr32mg24_smu.h844 #define _SMU_PPUFS_MASK 0x000000FFUL /**< Mask … macro

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