_CMU_DPLLCTRL_MODE_FREQLL (reference) in projects: hal_silabs-3.7.0

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Searched refs:_CMU_DPLLCTRL_MODE_FREQLL (Results 1 – 25 of 79) sorted by relevance

12 3 4

/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32MG12P/Include/
D	efr32mg12p_cmu.h	`642 #define _CMU_DPLLCTRL_MODE_FREQLL 0x00000000UL … macro 645 #define CMU_DPLLCTRL_MODE_FREQLL (_CMU_DPLLCTRL_MODE_FREQLL << 0) …`
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32PG12B/Include/
D	efm32pg12b_cmu.h	`642 #define _CMU_DPLLCTRL_MODE_FREQLL 0x00000000UL … macro 645 #define CMU_DPLLCTRL_MODE_FREQLL (_CMU_DPLLCTRL_MODE_FREQLL << 0) …`
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32JG12B/Include/
D	efm32jg12b_cmu.h	`642 #define _CMU_DPLLCTRL_MODE_FREQLL 0x00000000UL … macro 645 #define CMU_DPLLCTRL_MODE_FREQLL (_CMU_DPLLCTRL_MODE_FREQLL << 0) …`
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32BG13P/Include/
D	efr32bg13p_cmu.h	`649 #define _CMU_DPLLCTRL_MODE_FREQLL 0x00000000UL … macro 652 #define CMU_DPLLCTRL_MODE_FREQLL (_CMU_DPLLCTRL_MODE_FREQLL << 0) …`
D	efr32bg13p532f512gm32.h	`2644 #define _CMU_DPLLCTRL_MODE_FREQLL 0x00000000UL … macro 2647 #define CMU_DPLLCTRL_MODE_FREQLL (_CMU_DPLLCTRL_MODE_FREQLL << 0) …`
D	efr32bg13p532f512gm48.h	`2644 #define _CMU_DPLLCTRL_MODE_FREQLL 0x00000000UL … macro 2647 #define CMU_DPLLCTRL_MODE_FREQLL (_CMU_DPLLCTRL_MODE_FREQLL << 0) …`
D	efr32bg13p632f512im32.h	`2644 #define _CMU_DPLLCTRL_MODE_FREQLL 0x00000000UL … macro 2647 #define CMU_DPLLCTRL_MODE_FREQLL (_CMU_DPLLCTRL_MODE_FREQLL << 0) …`
D	efr32bg13p632f512gm32.h	`2644 #define _CMU_DPLLCTRL_MODE_FREQLL 0x00000000UL … macro 2647 #define CMU_DPLLCTRL_MODE_FREQLL (_CMU_DPLLCTRL_MODE_FREQLL << 0) …`
D	efr32bg13p632f512gm48.h	`2644 #define _CMU_DPLLCTRL_MODE_FREQLL 0x00000000UL … macro 2647 #define CMU_DPLLCTRL_MODE_FREQLL (_CMU_DPLLCTRL_MODE_FREQLL << 0) …`
D	efr32bg13p632f512im48.h	`2644 #define _CMU_DPLLCTRL_MODE_FREQLL 0x00000000UL … macro 2647 #define CMU_DPLLCTRL_MODE_FREQLL (_CMU_DPLLCTRL_MODE_FREQLL << 0) …`
D	efr32bg13p732f512gm32.h	`2644 #define _CMU_DPLLCTRL_MODE_FREQLL 0x00000000UL … macro 2647 #define CMU_DPLLCTRL_MODE_FREQLL (_CMU_DPLLCTRL_MODE_FREQLL << 0) …`
D	efr32bg13p732f512gm48.h	`2644 #define _CMU_DPLLCTRL_MODE_FREQLL 0x00000000UL … macro 2647 #define CMU_DPLLCTRL_MODE_FREQLL (_CMU_DPLLCTRL_MODE_FREQLL << 0) …`
D	efr32bg13p733f512gm48.h	`2644 #define _CMU_DPLLCTRL_MODE_FREQLL 0x00000000UL … macro 2647 #define CMU_DPLLCTRL_MODE_FREQLL (_CMU_DPLLCTRL_MODE_FREQLL << 0) …`
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32FG13P/Include/
D	efr32fg13p_cmu.h	`649 #define _CMU_DPLLCTRL_MODE_FREQLL 0x00000000UL … macro 652 #define CMU_DPLLCTRL_MODE_FREQLL (_CMU_DPLLCTRL_MODE_FREQLL << 0) …`
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/
D	efm32gg12b_cmu.h	`741 #define _CMU_DPLLCTRL_MODE_FREQLL 0x00000000UL … macro 744 #define CMU_DPLLCTRL_MODE_FREQLL (_CMU_DPLLCTRL_MODE_FREQLL << 0) …`
D	efm32gg12b390f1024gl112.h	`4577 #define _CMU_DPLLCTRL_MODE_FREQLL 0x00000000UL … macro 4580 #define CMU_DPLLCTRL_MODE_FREQLL (_CMU_DPLLCTRL_MODE_FREQLL << 0) …`
D	efm32gg12b390f512gl112.h	`4577 #define _CMU_DPLLCTRL_MODE_FREQLL 0x00000000UL … macro 4580 #define CMU_DPLLCTRL_MODE_FREQLL (_CMU_DPLLCTRL_MODE_FREQLL << 0) …`
D	efm32gg12b110f1024gq64.h	`5408 #define _CMU_DPLLCTRL_MODE_FREQLL 0x00000000UL … macro 5411 #define CMU_DPLLCTRL_MODE_FREQLL (_CMU_DPLLCTRL_MODE_FREQLL << 0) …`
D	efm32gg12b110f1024gm64.h	`5408 #define _CMU_DPLLCTRL_MODE_FREQLL 0x00000000UL … macro 5411 #define CMU_DPLLCTRL_MODE_FREQLL (_CMU_DPLLCTRL_MODE_FREQLL << 0) …`
D	efm32gg12b110f1024iq64.h	`5408 #define _CMU_DPLLCTRL_MODE_FREQLL 0x00000000UL … macro 5411 #define CMU_DPLLCTRL_MODE_FREQLL (_CMU_DPLLCTRL_MODE_FREQLL << 0) …`
D	efm32gg12b530f512iq64.h	`5416 #define _CMU_DPLLCTRL_MODE_FREQLL 0x00000000UL … macro 5419 #define CMU_DPLLCTRL_MODE_FREQLL (_CMU_DPLLCTRL_MODE_FREQLL << 0) …`
D	efm32gg12b530f512il112.h	`5416 #define _CMU_DPLLCTRL_MODE_FREQLL 0x00000000UL … macro 5419 #define CMU_DPLLCTRL_MODE_FREQLL (_CMU_DPLLCTRL_MODE_FREQLL << 0) …`
D	efm32gg12b530f512il120.h	`5416 #define _CMU_DPLLCTRL_MODE_FREQLL 0x00000000UL … macro 5419 #define CMU_DPLLCTRL_MODE_FREQLL (_CMU_DPLLCTRL_MODE_FREQLL << 0) …`
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/
D	efm32gg11b_cmu.h	`741 #define _CMU_DPLLCTRL_MODE_FREQLL 0x00000000UL … macro 744 #define CMU_DPLLCTRL_MODE_FREQLL (_CMU_DPLLCTRL_MODE_FREQLL << 0) …`
/hal_silabs-3.7.0/gecko/emlib/inc/
D	em_cmu.h	`3087 cmuDPLLLockMode_Freq = _CMU_DPLLCTRL_MODE_FREQLL, /*< Frequency lock mode. /`

12 3 4

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