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Searched refs:_SMU_PPUPATD0_GPIO_MASK (Results 1 – 25 of 73) sorted by relevance

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/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_smu.h186 #define _SMU_PPUPATD0_GPIO_MASK 0x20000UL /**< Bit mask for… macro
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_smu.h186 #define _SMU_PPUPATD0_GPIO_MASK 0x20000UL /**< Bit mask for… macro
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_smu.h186 #define _SMU_PPUPATD0_GPIO_MASK 0x20000UL /**< Bit mask for… macro
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_smu.h186 #define _SMU_PPUPATD0_GPIO_MASK 0x20000UL /**< Bit mask for… macro
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_smu.h186 #define _SMU_PPUPATD0_GPIO_MASK 0x20000UL /**< Bit mask for… macro
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_smu.h207 #define _SMU_PPUPATD0_GPIO_MASK 0x20000UL /**< Bit mask for… macro
Defm32gg12b390f1024gl112.h7652 #define _SMU_PPUPATD0_GPIO_MASK 0x20000UL /**< Bit mask for… macro
Defm32gg12b390f512gl112.h7652 #define _SMU_PPUPATD0_GPIO_MASK 0x20000UL /**< Bit mask for… macro
Defm32gg12b530f512il120.h8460 #define _SMU_PPUPATD0_GPIO_MASK 0x20000UL /**< Bit mask for… macro
Defm32gg12b530f512im64.h8460 #define _SMU_PPUPATD0_GPIO_MASK 0x20000UL /**< Bit mask for… macro
Defm32gg12b530f512iq100.h8460 #define _SMU_PPUPATD0_GPIO_MASK 0x20000UL /**< Bit mask for… macro
Defm32gg12b530f512iq64.h8460 #define _SMU_PPUPATD0_GPIO_MASK 0x20000UL /**< Bit mask for… macro
Defm32gg12b530f512gm64.h8460 #define _SMU_PPUPATD0_GPIO_MASK 0x20000UL /**< Bit mask for… macro
Defm32gg12b530f512gq100.h8460 #define _SMU_PPUPATD0_GPIO_MASK 0x20000UL /**< Bit mask for… macro
Defm32gg12b530f512gq64.h8460 #define _SMU_PPUPATD0_GPIO_MASK 0x20000UL /**< Bit mask for… macro
Defm32gg12b530f512il112.h8460 #define _SMU_PPUPATD0_GPIO_MASK 0x20000UL /**< Bit mask for… macro
Defm32gg12b110f1024gm64.h8429 #define _SMU_PPUPATD0_GPIO_MASK 0x20000UL /**< Bit mask for… macro
Defm32gg12b510f1024gl112.h8460 #define _SMU_PPUPATD0_GPIO_MASK 0x20000UL /**< Bit mask for… macro
Defm32gg12b510f1024gl120.h8460 #define _SMU_PPUPATD0_GPIO_MASK 0x20000UL /**< Bit mask for… macro
Defm32gg12b510f1024gm64.h8460 #define _SMU_PPUPATD0_GPIO_MASK 0x20000UL /**< Bit mask for… macro
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_smu.h217 #define _SMU_PPUPATD0_GPIO_MASK 0x80000UL /**< Bit mask for… macro
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFR32MG21/Include/
Defr32mg21_smu.h361 #define _SMU_PPUPATD0_GPIO_MASK 0x2000UL /**< B… macro
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFR32BG22/Include/
Defr32bg22_smu.h361 #define _SMU_PPUPATD0_GPIO_MASK 0x2000UL /**< B… macro
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFR32BG27/Include/
Defr32bg27_smu.h361 #define _SMU_PPUPATD0_GPIO_MASK 0x2000UL /**< B… macro
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFR32MG24/Include/
Defr32mg24_smu.h356 #define _SMU_PPUPATD0_GPIO_MASK 0x1000UL /**< Bi… macro

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