_GPIO_EXTIPSELL_EXTIPSEL1_PORTE (reference) in projects: hal_silabs-3.6.0

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Searched refs:_GPIO_EXTIPSELL_EXTIPSEL1_PORTE (Results 1 – 4 of 4) sorted by relevance

/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32HG/Include/
D	efm32hg_gpio.h	`748 #define _GPIO_EXTIPSELL_EXTIPSEL1_PORTE 0x00000004UL … macro 755 #define GPIO_EXTIPSELL_EXTIPSEL1_PORTE (_GPIO_EXTIPSELL_EXTIPSEL1_PORTE << 4) …`
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32WG/Include/
D	efm32wg_gpio.h	`748 #define _GPIO_EXTIPSELL_EXTIPSEL1_PORTE 0x00000004UL … macro 755 #define GPIO_EXTIPSELL_EXTIPSEL1_PORTE (_GPIO_EXTIPSELL_EXTIPSEL1_PORTE << 4) …`
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/
D	efm32gg12b_gpio.h	`770 #define _GPIO_EXTIPSELL_EXTIPSEL1_PORTE 0x00000004UL /… macro 777 #define GPIO_EXTIPSELL_EXTIPSEL1_PORTE (_GPIO_EXTIPSELL_EXTIPSEL1_PORTE << 4) /…`
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/
D	efm32gg11b_gpio.h	`776 #define _GPIO_EXTIPSELL_EXTIPSEL1_PORTE 0x00000004UL /… macro 786 #define GPIO_EXTIPSELL_EXTIPSEL1_PORTE (_GPIO_EXTIPSELL_EXTIPSEL1_PORTE << 4) /…`

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
Zephyr-Core-3.4.0
Zephyr-Core-3.5.0
Zephyr-Core-3.6.0
Zephyr-Core-3.7.0
acpica-3.5.0
acpica-3.6.0
acpica-3.7.0
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babblesim_ext_2G4_channel_multiatt-3.4.0
babblesim_ext_2G4_channel_multiatt-3.7.0-3.6.0-3.5.0
babblesim_ext_2G4_device_WLAN_actmod-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_burst_interferer-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.7.0
babblesim_ext_2G4_libPhyComv1-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_libPhyComv1-3.7.0
babblesim_ext_2G4_modem_BLE_simple-3.4.0
babblesim_ext_2G4_modem_BLE_simple-3.6.0-3.5.0
babblesim_ext_2G4_modem_BLE_simple-3.7.0
babblesim_ext_2G4_modem_magic-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_modem_magic-3.7.0
babblesim_ext_2G4_phy_v1-3.4.0
babblesim_ext_2G4_phy_v1-3.6.0-3.5.0
babblesim_ext_2G4_phy_v1-3.7.0
babblesim_ext_libCryptov1-3.7.0-3.6.0-3.5.0-3.4.0
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