Home
last modified time | relevance | path

Searched refs:_DMA_RDS_RDSCH4_DEFAULT (Results 1 – 25 of 28) sorted by relevance

12

/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32WG/Include/
Defm32wg_dma.h1388 #define _DMA_RDS_RDSCH4_DEFAULT 0x00000000UL /**< Mode … macro
1389 #define DMA_RDS_RDSCH4_DEFAULT (_DMA_RDS_RDSCH4_DEFAULT << 4) /**< Shift…
Defm32wg360f128.h1825 #define _DMA_RDS_RDSCH4_DEFAULT 0x00000000UL /**< Mode … macro
1826 #define DMA_RDS_RDSCH4_DEFAULT (_DMA_RDS_RDSCH4_DEFAULT << 4) /**< Shift…
Defm32wg360f256.h1825 #define _DMA_RDS_RDSCH4_DEFAULT 0x00000000UL /**< Mode … macro
1826 #define DMA_RDS_RDSCH4_DEFAULT (_DMA_RDS_RDSCH4_DEFAULT << 4) /**< Shift…
Defm32wg360f64.h1825 #define _DMA_RDS_RDSCH4_DEFAULT 0x00000000UL /**< Mode … macro
1826 #define DMA_RDS_RDSCH4_DEFAULT (_DMA_RDS_RDSCH4_DEFAULT << 4) /**< Shift…
Defm32wg940f128.h1918 #define _DMA_RDS_RDSCH4_DEFAULT 0x00000000UL /**< Mode … macro
1919 #define DMA_RDS_RDSCH4_DEFAULT (_DMA_RDS_RDSCH4_DEFAULT << 4) /**< Shift…
Defm32wg940f256.h1918 #define _DMA_RDS_RDSCH4_DEFAULT 0x00000000UL /**< Mode … macro
1919 #define DMA_RDS_RDSCH4_DEFAULT (_DMA_RDS_RDSCH4_DEFAULT << 4) /**< Shift…
Defm32wg940f64.h1918 #define _DMA_RDS_RDSCH4_DEFAULT 0x00000000UL /**< Mode … macro
1919 #define DMA_RDS_RDSCH4_DEFAULT (_DMA_RDS_RDSCH4_DEFAULT << 4) /**< Shift…
Defm32wg942f128.h1918 #define _DMA_RDS_RDSCH4_DEFAULT 0x00000000UL /**< Mode … macro
1919 #define DMA_RDS_RDSCH4_DEFAULT (_DMA_RDS_RDSCH4_DEFAULT << 4) /**< Shift…
Defm32wg942f256.h1918 #define _DMA_RDS_RDSCH4_DEFAULT 0x00000000UL /**< Mode … macro
1919 #define DMA_RDS_RDSCH4_DEFAULT (_DMA_RDS_RDSCH4_DEFAULT << 4) /**< Shift…
Defm32wg942f64.h1918 #define _DMA_RDS_RDSCH4_DEFAULT 0x00000000UL /**< Mode … macro
1919 #define DMA_RDS_RDSCH4_DEFAULT (_DMA_RDS_RDSCH4_DEFAULT << 4) /**< Shift…
Defm32wg232f256.h1900 #define _DMA_RDS_RDSCH4_DEFAULT 0x00000000UL /**< Mode … macro
1901 #define DMA_RDS_RDSCH4_DEFAULT (_DMA_RDS_RDSCH4_DEFAULT << 4) /**< Shift…
Defm32wg232f64.h1900 #define _DMA_RDS_RDSCH4_DEFAULT 0x00000000UL /**< Mode … macro
1901 #define DMA_RDS_RDSCH4_DEFAULT (_DMA_RDS_RDSCH4_DEFAULT << 4) /**< Shift…
Defm32wg330f128.h1913 #define _DMA_RDS_RDSCH4_DEFAULT 0x00000000UL /**< Mode … macro
1914 #define DMA_RDS_RDSCH4_DEFAULT (_DMA_RDS_RDSCH4_DEFAULT << 4) /**< Shift…
Defm32wg330f256.h1913 #define _DMA_RDS_RDSCH4_DEFAULT 0x00000000UL /**< Mode … macro
1914 #define DMA_RDS_RDSCH4_DEFAULT (_DMA_RDS_RDSCH4_DEFAULT << 4) /**< Shift…
Defm32wg330f64.h1913 #define _DMA_RDS_RDSCH4_DEFAULT 0x00000000UL /**< Mode … macro
1914 #define DMA_RDS_RDSCH4_DEFAULT (_DMA_RDS_RDSCH4_DEFAULT << 4) /**< Shift…
Defm32wg332f128.h1913 #define _DMA_RDS_RDSCH4_DEFAULT 0x00000000UL /**< Mode … macro
1914 #define DMA_RDS_RDSCH4_DEFAULT (_DMA_RDS_RDSCH4_DEFAULT << 4) /**< Shift…
Defm32wg332f256.h1913 #define _DMA_RDS_RDSCH4_DEFAULT 0x00000000UL /**< Mode … macro
1914 #define DMA_RDS_RDSCH4_DEFAULT (_DMA_RDS_RDSCH4_DEFAULT << 4) /**< Shift…
Defm32wg332f64.h1913 #define _DMA_RDS_RDSCH4_DEFAULT 0x00000000UL /**< Mode … macro
1914 #define DMA_RDS_RDSCH4_DEFAULT (_DMA_RDS_RDSCH4_DEFAULT << 4) /**< Shift…
Defm32wg230f128.h1900 #define _DMA_RDS_RDSCH4_DEFAULT 0x00000000UL /**< Mode … macro
1901 #define DMA_RDS_RDSCH4_DEFAULT (_DMA_RDS_RDSCH4_DEFAULT << 4) /**< Shift…
Defm32wg230f256.h1900 #define _DMA_RDS_RDSCH4_DEFAULT 0x00000000UL /**< Mode … macro
1901 #define DMA_RDS_RDSCH4_DEFAULT (_DMA_RDS_RDSCH4_DEFAULT << 4) /**< Shift…
Defm32wg230f64.h1900 #define _DMA_RDS_RDSCH4_DEFAULT 0x00000000UL /**< Mode … macro
1901 #define DMA_RDS_RDSCH4_DEFAULT (_DMA_RDS_RDSCH4_DEFAULT << 4) /**< Shift…
Defm32wg232f128.h1900 #define _DMA_RDS_RDSCH4_DEFAULT 0x00000000UL /**< Mode … macro
1901 #define DMA_RDS_RDSCH4_DEFAULT (_DMA_RDS_RDSCH4_DEFAULT << 4) /**< Shift…
Defm32wg840f128.h1905 #define _DMA_RDS_RDSCH4_DEFAULT 0x00000000UL /**< Mode … macro
1906 #define DMA_RDS_RDSCH4_DEFAULT (_DMA_RDS_RDSCH4_DEFAULT << 4) /**< Shift…
Defm32wg840f256.h1905 #define _DMA_RDS_RDSCH4_DEFAULT 0x00000000UL /**< Mode … macro
1906 #define DMA_RDS_RDSCH4_DEFAULT (_DMA_RDS_RDSCH4_DEFAULT << 4) /**< Shift…
Defm32wg840f64.h1905 #define _DMA_RDS_RDSCH4_DEFAULT 0x00000000UL /**< Mode … macro
1906 #define DMA_RDS_RDSCH4_DEFAULT (_DMA_RDS_RDSCH4_DEFAULT << 4) /**< Shift…

12