/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32HG/Include/ |
D | efm32hg_dma.h | 144 #define _DMA_CTRLBASE_CTRLBASE_DEFAULT 0x00000000UL /**< … macro 145 #define DMA_CTRLBASE_CTRLBASE_DEFAULT (_DMA_CTRLBASE_CTRLBASE_DEFAULT << 0) /**< …
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D | efm32hg321f32.h | 504 #define _DMA_CTRLBASE_CTRLBASE_DEFAULT 0x00000000UL /**< … macro 505 #define DMA_CTRLBASE_CTRLBASE_DEFAULT (_DMA_CTRLBASE_CTRLBASE_DEFAULT << 0) /**< …
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D | efm32hg321f64.h | 504 #define _DMA_CTRLBASE_CTRLBASE_DEFAULT 0x00000000UL /**< … macro 505 #define DMA_CTRLBASE_CTRLBASE_DEFAULT (_DMA_CTRLBASE_CTRLBASE_DEFAULT << 0) /**< …
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D | efm32hg108f32.h | 550 #define _DMA_CTRLBASE_CTRLBASE_DEFAULT 0x00000000UL /**< … macro 551 #define DMA_CTRLBASE_CTRLBASE_DEFAULT (_DMA_CTRLBASE_CTRLBASE_DEFAULT << 0) /**< …
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D | efm32hg108f64.h | 550 #define _DMA_CTRLBASE_CTRLBASE_DEFAULT 0x00000000UL /**< … macro 551 #define DMA_CTRLBASE_CTRLBASE_DEFAULT (_DMA_CTRLBASE_CTRLBASE_DEFAULT << 0) /**< …
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D | efm32hg308f32.h | 562 #define _DMA_CTRLBASE_CTRLBASE_DEFAULT 0x00000000UL /**< … macro 563 #define DMA_CTRLBASE_CTRLBASE_DEFAULT (_DMA_CTRLBASE_CTRLBASE_DEFAULT << 0) /**< …
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D | efm32hg308f64.h | 562 #define _DMA_CTRLBASE_CTRLBASE_DEFAULT 0x00000000UL /**< … macro 563 #define DMA_CTRLBASE_CTRLBASE_DEFAULT (_DMA_CTRLBASE_CTRLBASE_DEFAULT << 0) /**< …
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/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32WG/Include/ |
D | efm32wg_dma.h | 152 #define _DMA_CTRLBASE_CTRLBASE_DEFAULT 0x00000000UL /**< … macro 153 #define DMA_CTRLBASE_CTRLBASE_DEFAULT (_DMA_CTRLBASE_CTRLBASE_DEFAULT << 0) /**< …
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D | efm32wg360f128.h | 589 #define _DMA_CTRLBASE_CTRLBASE_DEFAULT 0x00000000UL /**< … macro 590 #define DMA_CTRLBASE_CTRLBASE_DEFAULT (_DMA_CTRLBASE_CTRLBASE_DEFAULT << 0) /**< …
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D | efm32wg360f256.h | 589 #define _DMA_CTRLBASE_CTRLBASE_DEFAULT 0x00000000UL /**< … macro 590 #define DMA_CTRLBASE_CTRLBASE_DEFAULT (_DMA_CTRLBASE_CTRLBASE_DEFAULT << 0) /**< …
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D | efm32wg360f64.h | 589 #define _DMA_CTRLBASE_CTRLBASE_DEFAULT 0x00000000UL /**< … macro 590 #define DMA_CTRLBASE_CTRLBASE_DEFAULT (_DMA_CTRLBASE_CTRLBASE_DEFAULT << 0) /**< …
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D | efm32wg940f128.h | 682 #define _DMA_CTRLBASE_CTRLBASE_DEFAULT 0x00000000UL /**< … macro 683 #define DMA_CTRLBASE_CTRLBASE_DEFAULT (_DMA_CTRLBASE_CTRLBASE_DEFAULT << 0) /**< …
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D | efm32wg940f256.h | 682 #define _DMA_CTRLBASE_CTRLBASE_DEFAULT 0x00000000UL /**< … macro 683 #define DMA_CTRLBASE_CTRLBASE_DEFAULT (_DMA_CTRLBASE_CTRLBASE_DEFAULT << 0) /**< …
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D | efm32wg940f64.h | 682 #define _DMA_CTRLBASE_CTRLBASE_DEFAULT 0x00000000UL /**< … macro 683 #define DMA_CTRLBASE_CTRLBASE_DEFAULT (_DMA_CTRLBASE_CTRLBASE_DEFAULT << 0) /**< …
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D | efm32wg942f128.h | 682 #define _DMA_CTRLBASE_CTRLBASE_DEFAULT 0x00000000UL /**< … macro 683 #define DMA_CTRLBASE_CTRLBASE_DEFAULT (_DMA_CTRLBASE_CTRLBASE_DEFAULT << 0) /**< …
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D | efm32wg942f256.h | 682 #define _DMA_CTRLBASE_CTRLBASE_DEFAULT 0x00000000UL /**< … macro 683 #define DMA_CTRLBASE_CTRLBASE_DEFAULT (_DMA_CTRLBASE_CTRLBASE_DEFAULT << 0) /**< …
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D | efm32wg942f64.h | 682 #define _DMA_CTRLBASE_CTRLBASE_DEFAULT 0x00000000UL /**< … macro 683 #define DMA_CTRLBASE_CTRLBASE_DEFAULT (_DMA_CTRLBASE_CTRLBASE_DEFAULT << 0) /**< …
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D | efm32wg232f256.h | 664 #define _DMA_CTRLBASE_CTRLBASE_DEFAULT 0x00000000UL /**< … macro 665 #define DMA_CTRLBASE_CTRLBASE_DEFAULT (_DMA_CTRLBASE_CTRLBASE_DEFAULT << 0) /**< …
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D | efm32wg232f64.h | 664 #define _DMA_CTRLBASE_CTRLBASE_DEFAULT 0x00000000UL /**< … macro 665 #define DMA_CTRLBASE_CTRLBASE_DEFAULT (_DMA_CTRLBASE_CTRLBASE_DEFAULT << 0) /**< …
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D | efm32wg330f128.h | 677 #define _DMA_CTRLBASE_CTRLBASE_DEFAULT 0x00000000UL /**< … macro 678 #define DMA_CTRLBASE_CTRLBASE_DEFAULT (_DMA_CTRLBASE_CTRLBASE_DEFAULT << 0) /**< …
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D | efm32wg330f256.h | 677 #define _DMA_CTRLBASE_CTRLBASE_DEFAULT 0x00000000UL /**< … macro 678 #define DMA_CTRLBASE_CTRLBASE_DEFAULT (_DMA_CTRLBASE_CTRLBASE_DEFAULT << 0) /**< …
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D | efm32wg330f64.h | 677 #define _DMA_CTRLBASE_CTRLBASE_DEFAULT 0x00000000UL /**< … macro 678 #define DMA_CTRLBASE_CTRLBASE_DEFAULT (_DMA_CTRLBASE_CTRLBASE_DEFAULT << 0) /**< …
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D | efm32wg332f128.h | 677 #define _DMA_CTRLBASE_CTRLBASE_DEFAULT 0x00000000UL /**< … macro 678 #define DMA_CTRLBASE_CTRLBASE_DEFAULT (_DMA_CTRLBASE_CTRLBASE_DEFAULT << 0) /**< …
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D | efm32wg332f256.h | 677 #define _DMA_CTRLBASE_CTRLBASE_DEFAULT 0x00000000UL /**< … macro 678 #define DMA_CTRLBASE_CTRLBASE_DEFAULT (_DMA_CTRLBASE_CTRLBASE_DEFAULT << 0) /**< …
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D | efm32wg332f64.h | 677 #define _DMA_CTRLBASE_CTRLBASE_DEFAULT 0x00000000UL /**< … macro 678 #define DMA_CTRLBASE_CTRLBASE_DEFAULT (_DMA_CTRLBASE_CTRLBASE_DEFAULT << 0) /**< …
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