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Searched refs:_CMU_HFCORECLKEN0_AES_DEFAULT (Results 1 – 25 of 62) sorted by relevance

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/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32WG/Include/
Defm32wg_cmu.h827 #define _CMU_HFCORECLKEN0_AES_DEFAULT 0x00000000UL /**< Mode… macro
828 #define CMU_HFCORECLKEN0_AES_DEFAULT (_CMU_HFCORECLKEN0_AES_DEFAULT << 1) /**< Shif…
Defm32wg390f128.h1228 #define _CMU_HFCORECLKEN0_AES_DEFAULT 0x00000000UL /**< Mode… macro
1229 #define CMU_HFCORECLKEN0_AES_DEFAULT (_CMU_HFCORECLKEN0_AES_DEFAULT << 1) /**< Shif…
Defm32wg390f256.h1228 #define _CMU_HFCORECLKEN0_AES_DEFAULT 0x00000000UL /**< Mode… macro
1229 #define CMU_HFCORECLKEN0_AES_DEFAULT (_CMU_HFCORECLKEN0_AES_DEFAULT << 1) /**< Shif…
Defm32wg380f128.h1228 #define _CMU_HFCORECLKEN0_AES_DEFAULT 0x00000000UL /**< Mode… macro
1229 #define CMU_HFCORECLKEN0_AES_DEFAULT (_CMU_HFCORECLKEN0_AES_DEFAULT << 1) /**< Shif…
Defm32wg380f256.h1228 #define _CMU_HFCORECLKEN0_AES_DEFAULT 0x00000000UL /**< Mode… macro
1229 #define CMU_HFCORECLKEN0_AES_DEFAULT (_CMU_HFCORECLKEN0_AES_DEFAULT << 1) /**< Shif…
Defm32wg380f64.h1228 #define _CMU_HFCORECLKEN0_AES_DEFAULT 0x00000000UL /**< Mode… macro
1229 #define CMU_HFCORECLKEN0_AES_DEFAULT (_CMU_HFCORECLKEN0_AES_DEFAULT << 1) /**< Shif…
Defm32wg390f64.h1228 #define _CMU_HFCORECLKEN0_AES_DEFAULT 0x00000000UL /**< Mode… macro
1229 #define CMU_HFCORECLKEN0_AES_DEFAULT (_CMU_HFCORECLKEN0_AES_DEFAULT << 1) /**< Shif…
Defm32wg395f128.h1228 #define _CMU_HFCORECLKEN0_AES_DEFAULT 0x00000000UL /**< Mode… macro
1229 #define CMU_HFCORECLKEN0_AES_DEFAULT (_CMU_HFCORECLKEN0_AES_DEFAULT << 1) /**< Shif…
Defm32wg395f256.h1228 #define _CMU_HFCORECLKEN0_AES_DEFAULT 0x00000000UL /**< Mode… macro
1229 #define CMU_HFCORECLKEN0_AES_DEFAULT (_CMU_HFCORECLKEN0_AES_DEFAULT << 1) /**< Shif…
Defm32wg395f64.h1228 #define _CMU_HFCORECLKEN0_AES_DEFAULT 0x00000000UL /**< Mode… macro
1229 #define CMU_HFCORECLKEN0_AES_DEFAULT (_CMU_HFCORECLKEN0_AES_DEFAULT << 1) /**< Shif…
Defm32wg280f128.h1273 #define _CMU_HFCORECLKEN0_AES_DEFAULT 0x00000000UL /**< Mode … macro
1274 #define CMU_HFCORECLKEN0_AES_DEFAULT (_CMU_HFCORECLKEN0_AES_DEFAULT << 1) /**< Shift…
Defm32wg280f256.h1273 #define _CMU_HFCORECLKEN0_AES_DEFAULT 0x00000000UL /**< Mode … macro
1274 #define CMU_HFCORECLKEN0_AES_DEFAULT (_CMU_HFCORECLKEN0_AES_DEFAULT << 1) /**< Shift…
Defm32wg280f64.h1273 #define _CMU_HFCORECLKEN0_AES_DEFAULT 0x00000000UL /**< Mode … macro
1274 #define CMU_HFCORECLKEN0_AES_DEFAULT (_CMU_HFCORECLKEN0_AES_DEFAULT << 1) /**< Shift…
Defm32wg290f128.h1273 #define _CMU_HFCORECLKEN0_AES_DEFAULT 0x00000000UL /**< Mode … macro
1274 #define CMU_HFCORECLKEN0_AES_DEFAULT (_CMU_HFCORECLKEN0_AES_DEFAULT << 1) /**< Shift…
Defm32wg290f256.h1273 #define _CMU_HFCORECLKEN0_AES_DEFAULT 0x00000000UL /**< Mode … macro
1274 #define CMU_HFCORECLKEN0_AES_DEFAULT (_CMU_HFCORECLKEN0_AES_DEFAULT << 1) /**< Shift…
Defm32wg290f64.h1273 #define _CMU_HFCORECLKEN0_AES_DEFAULT 0x00000000UL /**< Mode … macro
1274 #define CMU_HFCORECLKEN0_AES_DEFAULT (_CMU_HFCORECLKEN0_AES_DEFAULT << 1) /**< Shift…
Defm32wg295f128.h1273 #define _CMU_HFCORECLKEN0_AES_DEFAULT 0x00000000UL /**< Mode … macro
1274 #define CMU_HFCORECLKEN0_AES_DEFAULT (_CMU_HFCORECLKEN0_AES_DEFAULT << 1) /**< Shift…
Defm32wg295f256.h1273 #define _CMU_HFCORECLKEN0_AES_DEFAULT 0x00000000UL /**< Mode … macro
1274 #define CMU_HFCORECLKEN0_AES_DEFAULT (_CMU_HFCORECLKEN0_AES_DEFAULT << 1) /**< Shift…
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32HG/Include/
Defm32hg_cmu.h879 #define _CMU_HFCORECLKEN0_AES_DEFAULT 0x00000000UL /**< Mode… macro
880 #define CMU_HFCORECLKEN0_AES_DEFAULT (_CMU_HFCORECLKEN0_AES_DEFAULT << 0) /**< Shif…
Defm32hg110f32.h1206 #define _CMU_HFCORECLKEN0_AES_DEFAULT 0x00000000UL /**< Mode … macro
1207 #define CMU_HFCORECLKEN0_AES_DEFAULT (_CMU_HFCORECLKEN0_AES_DEFAULT << 0) /**< Shift…
Defm32hg110f64.h1206 #define _CMU_HFCORECLKEN0_AES_DEFAULT 0x00000000UL /**< Mode … macro
1207 #define CMU_HFCORECLKEN0_AES_DEFAULT (_CMU_HFCORECLKEN0_AES_DEFAULT << 0) /**< Shift…
Defm32hg210f32.h1206 #define _CMU_HFCORECLKEN0_AES_DEFAULT 0x00000000UL /**< Mode … macro
1207 #define CMU_HFCORECLKEN0_AES_DEFAULT (_CMU_HFCORECLKEN0_AES_DEFAULT << 0) /**< Shift…
Defm32hg210f64.h1206 #define _CMU_HFCORECLKEN0_AES_DEFAULT 0x00000000UL /**< Mode … macro
1207 #define CMU_HFCORECLKEN0_AES_DEFAULT (_CMU_HFCORECLKEN0_AES_DEFAULT << 0) /**< Shift…
Defm32hg222f32.h1206 #define _CMU_HFCORECLKEN0_AES_DEFAULT 0x00000000UL /**< Mode … macro
1207 #define CMU_HFCORECLKEN0_AES_DEFAULT (_CMU_HFCORECLKEN0_AES_DEFAULT << 0) /**< Shift…
Defm32hg222f64.h1206 #define _CMU_HFCORECLKEN0_AES_DEFAULT 0x00000000UL /**< Mode … macro
1207 #define CMU_HFCORECLKEN0_AES_DEFAULT (_CMU_HFCORECLKEN0_AES_DEFAULT << 0) /**< Shift…

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