/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFR32FG13P/Include/ |
D | efr32fg13p_smu.h | 262 #define SMU_PPUPATD1_TIMER0_DEFAULT (_SMU_PPUPATD1_TIMER0_DEFAULT << 4) /**< Shifted mode … macro
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/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFR32BG13P/Include/ |
D | efr32bg13p_smu.h | 262 #define SMU_PPUPATD1_TIMER0_DEFAULT (_SMU_PPUPATD1_TIMER0_DEFAULT << 4) /**< Shifted mode … macro
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/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFR32MG12P/Include/ |
D | efr32mg12p_smu.h | 267 #define SMU_PPUPATD1_TIMER0_DEFAULT (_SMU_PPUPATD1_TIMER0_DEFAULT << 5) /**< Shifted mode … macro
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/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32PG12B/Include/ |
D | efm32pg12b_smu.h | 267 #define SMU_PPUPATD1_TIMER0_DEFAULT (_SMU_PPUPATD1_TIMER0_DEFAULT << 5) /**< Shifted mode … macro
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/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32JG12B/Include/ |
D | efm32jg12b_smu.h | 267 #define SMU_PPUPATD1_TIMER0_DEFAULT (_SMU_PPUPATD1_TIMER0_DEFAULT << 5) /**< Shifted mode … macro
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/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/ |
D | efm32gg12b_smu.h | 323 #define SMU_PPUPATD1_TIMER0_DEFAULT (_SMU_PPUPATD1_TIMER0_DEFAULT << 10) /**< Shifted mode … macro
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D | efm32gg12b390f1024gl112.h | 7763 #define SMU_PPUPATD1_TIMER0_DEFAULT (_SMU_PPUPATD1_TIMER0_DEFAULT << 10) /**< Shifted mode … macro
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D | efm32gg12b390f512gl112.h | 7763 #define SMU_PPUPATD1_TIMER0_DEFAULT (_SMU_PPUPATD1_TIMER0_DEFAULT << 10) /**< Shifted mode … macro
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D | efm32gg12b530f512il120.h | 8566 #define SMU_PPUPATD1_TIMER0_DEFAULT (_SMU_PPUPATD1_TIMER0_DEFAULT << 10) /**< Shifted mode … macro
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D | efm32gg12b530f512im64.h | 8566 #define SMU_PPUPATD1_TIMER0_DEFAULT (_SMU_PPUPATD1_TIMER0_DEFAULT << 10) /**< Shifted mode … macro
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D | efm32gg12b530f512iq100.h | 8566 #define SMU_PPUPATD1_TIMER0_DEFAULT (_SMU_PPUPATD1_TIMER0_DEFAULT << 10) /**< Shifted mode … macro
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D | efm32gg12b530f512iq64.h | 8566 #define SMU_PPUPATD1_TIMER0_DEFAULT (_SMU_PPUPATD1_TIMER0_DEFAULT << 10) /**< Shifted mode … macro
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D | efm32gg12b530f512gm64.h | 8566 #define SMU_PPUPATD1_TIMER0_DEFAULT (_SMU_PPUPATD1_TIMER0_DEFAULT << 10) /**< Shifted mode … macro
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D | efm32gg12b530f512gq100.h | 8566 #define SMU_PPUPATD1_TIMER0_DEFAULT (_SMU_PPUPATD1_TIMER0_DEFAULT << 10) /**< Shifted mode … macro
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D | efm32gg12b530f512gq64.h | 8566 #define SMU_PPUPATD1_TIMER0_DEFAULT (_SMU_PPUPATD1_TIMER0_DEFAULT << 10) /**< Shifted mode … macro
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D | efm32gg12b530f512il112.h | 8566 #define SMU_PPUPATD1_TIMER0_DEFAULT (_SMU_PPUPATD1_TIMER0_DEFAULT << 10) /**< Shifted mode … macro
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D | efm32gg12b110f1024gm64.h | 8530 #define SMU_PPUPATD1_TIMER0_DEFAULT (_SMU_PPUPATD1_TIMER0_DEFAULT << 10) /**< Shifted mode … macro
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D | efm32gg12b510f1024gl112.h | 8566 #define SMU_PPUPATD1_TIMER0_DEFAULT (_SMU_PPUPATD1_TIMER0_DEFAULT << 10) /**< Shifted mode … macro
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D | efm32gg12b510f1024gl120.h | 8566 #define SMU_PPUPATD1_TIMER0_DEFAULT (_SMU_PPUPATD1_TIMER0_DEFAULT << 10) /**< Shifted mode … macro
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D | efm32gg12b510f1024gm64.h | 8566 #define SMU_PPUPATD1_TIMER0_DEFAULT (_SMU_PPUPATD1_TIMER0_DEFAULT << 10) /**< Shifted mode … macro
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D | efm32gg12b510f1024gq100.h | 8566 #define SMU_PPUPATD1_TIMER0_DEFAULT (_SMU_PPUPATD1_TIMER0_DEFAULT << 10) /**< Shifted mode … macro
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D | efm32gg12b510f1024gq64.h | 8566 #define SMU_PPUPATD1_TIMER0_DEFAULT (_SMU_PPUPATD1_TIMER0_DEFAULT << 10) /**< Shifted mode … macro
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D | efm32gg12b510f1024il112.h | 8566 #define SMU_PPUPATD1_TIMER0_DEFAULT (_SMU_PPUPATD1_TIMER0_DEFAULT << 10) /**< Shifted mode … macro
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D | efm32gg12b510f1024il120.h | 8566 #define SMU_PPUPATD1_TIMER0_DEFAULT (_SMU_PPUPATD1_TIMER0_DEFAULT << 10) /**< Shifted mode … macro
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/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/ |
D | efm32gg11b_smu.h | 333 #define SMU_PPUPATD1_TIMER0_DEFAULT (_SMU_PPUPATD1_TIMER0_DEFAULT << 9) /**< Shifted mode … macro
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