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Searched refs:SMU_PPUFS_PERIPHID_I2C0 (Results 1 – 25 of 69) sorted by relevance

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/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_smu.h361 #define SMU_PPUFS_PERIPHID_I2C0 (_SMU_PPUFS_PERIPHID_I2C0 << 0) /**< Shifted mode I… macro
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_smu.h361 #define SMU_PPUFS_PERIPHID_I2C0 (_SMU_PPUFS_PERIPHID_I2C0 << 0) /**< Shifted mode I… macro
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_smu.h379 #define SMU_PPUFS_PERIPHID_I2C0 (_SMU_PPUFS_PERIPHID_I2C0 << 0) /**< Shifted mode I… macro
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_smu.h379 #define SMU_PPUFS_PERIPHID_I2C0 (_SMU_PPUFS_PERIPHID_I2C0 << 0) /**< Shifted mode I… macro
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_smu.h379 #define SMU_PPUFS_PERIPHID_I2C0 (_SMU_PPUFS_PERIPHID_I2C0 << 0) /**< Shifted mode I… macro
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_smu.h490 #define SMU_PPUFS_PERIPHID_I2C0 (_SMU_PPUFS_PERIPHID_I2C0 << 0) /**< Shifted mode I… macro
Defm32gg12b390f1024gl112.h7923 #define SMU_PPUFS_PERIPHID_I2C0 (_SMU_PPUFS_PERIPHID_I2C0 << 0) /**< Shifted mode I… macro
Defm32gg12b390f512gl112.h7923 #define SMU_PPUFS_PERIPHID_I2C0 (_SMU_PPUFS_PERIPHID_I2C0 << 0) /**< Shifted mode I… macro
Defm32gg12b530f512il120.h8725 #define SMU_PPUFS_PERIPHID_I2C0 (_SMU_PPUFS_PERIPHID_I2C0 << 0) /**< Shifted mode I… macro
Defm32gg12b530f512im64.h8725 #define SMU_PPUFS_PERIPHID_I2C0 (_SMU_PPUFS_PERIPHID_I2C0 << 0) /**< Shifted mode I… macro
Defm32gg12b530f512iq100.h8725 #define SMU_PPUFS_PERIPHID_I2C0 (_SMU_PPUFS_PERIPHID_I2C0 << 0) /**< Shifted mode I… macro
Defm32gg12b530f512iq64.h8725 #define SMU_PPUFS_PERIPHID_I2C0 (_SMU_PPUFS_PERIPHID_I2C0 << 0) /**< Shifted mode I… macro
Defm32gg12b530f512gm64.h8725 #define SMU_PPUFS_PERIPHID_I2C0 (_SMU_PPUFS_PERIPHID_I2C0 << 0) /**< Shifted mode I… macro
Defm32gg12b530f512gq100.h8725 #define SMU_PPUFS_PERIPHID_I2C0 (_SMU_PPUFS_PERIPHID_I2C0 << 0) /**< Shifted mode I… macro
Defm32gg12b530f512gq64.h8725 #define SMU_PPUFS_PERIPHID_I2C0 (_SMU_PPUFS_PERIPHID_I2C0 << 0) /**< Shifted mode I… macro
Defm32gg12b530f512il112.h8725 #define SMU_PPUFS_PERIPHID_I2C0 (_SMU_PPUFS_PERIPHID_I2C0 << 0) /**< Shifted mode I… macro
Defm32gg12b110f1024gm64.h8688 #define SMU_PPUFS_PERIPHID_I2C0 (_SMU_PPUFS_PERIPHID_I2C0 << 0) /**< Shifted mode I… macro
Defm32gg12b510f1024gl112.h8725 #define SMU_PPUFS_PERIPHID_I2C0 (_SMU_PPUFS_PERIPHID_I2C0 << 0) /**< Shifted mode I… macro
Defm32gg12b510f1024gl120.h8725 #define SMU_PPUFS_PERIPHID_I2C0 (_SMU_PPUFS_PERIPHID_I2C0 << 0) /**< Shifted mode I… macro
Defm32gg12b510f1024gm64.h8725 #define SMU_PPUFS_PERIPHID_I2C0 (_SMU_PPUFS_PERIPHID_I2C0 << 0) /**< Shifted mode I… macro
Defm32gg12b510f1024gq100.h8725 #define SMU_PPUFS_PERIPHID_I2C0 (_SMU_PPUFS_PERIPHID_I2C0 << 0) /**< Shifted mode I… macro
Defm32gg12b510f1024gq64.h8725 #define SMU_PPUFS_PERIPHID_I2C0 (_SMU_PPUFS_PERIPHID_I2C0 << 0) /**< Shifted mode I… macro
Defm32gg12b510f1024il112.h8725 #define SMU_PPUFS_PERIPHID_I2C0 (_SMU_PPUFS_PERIPHID_I2C0 << 0) /**< Shifted mode I… macro
Defm32gg12b510f1024il120.h8725 #define SMU_PPUFS_PERIPHID_I2C0 (_SMU_PPUFS_PERIPHID_I2C0 << 0) /**< Shifted mode I… macro
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_smu.h540 #define SMU_PPUFS_PERIPHID_I2C0 (_SMU_PPUFS_PERIPHID_I2C0 << 0) /**< Shifted mode I… macro

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