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Searched refs:RTCC (Results 1 – 25 of 263) sorted by relevance

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/hal_silabs-3.6.0/gecko/emlib/src/
Dem_rtcc.c84 RTCC->CC[ch].CTRL = ((uint32_t)confPtr->chMode << _RTCC_CC_CTRL_MODE_SHIFT) in RTCC_ChannelInit()
94 RTCC->CC[ch].CTRL = ( (uint32_t)confPtr->chMode << _RTCC_CC_CTRL_MODE_SHIFT) in RTCC_ChannelInit()
116 BUS_RegBitWrite((&RTCC->CTRL), _RTCC_CTRL_ENABLE_SHIFT, (uint32_t)enable); in RTCC_Enable()
120 if ((RTCC->EN == 0U) && !enable) { in RTCC_Enable()
124 if (RTCC->EN != 0U) { in RTCC_Enable()
130 RTCC->EN_SET = RTCC_EN_EN; in RTCC_Enable()
135 RTCC->EN_CLR = RTCC_EN_EN; in RTCC_Enable()
155 RTCC->CTRL = ((init->enable ? 1UL : 0UL) << _RTCC_CTRL_ENABLE_SHIFT) in RTCC_Init()
169 if (RTCC->EN != 0U) { in RTCC_Init()
172 RTCC->EN_CLR = RTCC_EN_EN; in RTCC_Init()
[all …]
/hal_silabs-3.6.0/gecko/emlib/inc/
Dem_rtcc.h405 return RTCC->CC[ch].CCV; in RTCC_ChannelCompareValueGet()
407 return RTCC->CC[ch].OCVALUE; in RTCC_ChannelCompareValueGet()
425 RTCC->CC[ch].CCV = value; in RTCC_ChannelCompareValueSet()
427 RTCC->CC[ch].OCVALUE = value; in RTCC_ChannelCompareValueSet()
445 return RTCC->CC[ch].CCV; in RTCC_ChannelCaptureValueGet()
447 return RTCC->CC[ch].ICVALUE; in RTCC_ChannelCaptureValueGet()
499 return RTCC->CC[ch].DATE; in RTCC_ChannelDateGet()
515 RTCC->CC[ch].DATE = date; in RTCC_ChannelDateSet()
531 return RTCC->CC[ch].TIME; in RTCC_ChannelTimeGet()
547 RTCC->CC[ch].TIME = time; in RTCC_ChannelTimeSet()
[all …]
/hal_silabs-3.6.0/gecko/service/sleeptimer/src/
Dsl_sleeptimer_hal_rtcc.c136 RTCC->CC[1].CTRL |= RTCC_CC_CTRL_MODE_OUTPUTCOMPARE; in sleeptimer_hal_set_compare()
174 RTCC->CC[1].CTRL &= ~_RTCC_CC_CTRL_MODE_MASK; in sleeptimer_hal_disable_int()
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32PG1B/Include/
Defm32pg1b100f128gm32.h356 #define RTCC ((RTCC_TypeDef *) RTCC_BASE) /**< RTCC base pointer */ macro
Defm32pg1b100f128im32.h356 #define RTCC ((RTCC_TypeDef *) RTCC_BASE) /**< RTCC base pointer */ macro
Defm32pg1b100f256gm32.h356 #define RTCC ((RTCC_TypeDef *) RTCC_BASE) /**< RTCC base pointer */ macro
Defm32pg1b100f256im32.h356 #define RTCC ((RTCC_TypeDef *) RTCC_BASE) /**< RTCC base pointer */ macro
Defm32pg1b200f128gm32.h358 #define RTCC ((RTCC_TypeDef *) RTCC_BASE) /**< RTCC base pointer */ macro
Defm32pg1b200f128gm48.h358 #define RTCC ((RTCC_TypeDef *) RTCC_BASE) /**< RTCC base pointer */ macro
Defm32pg1b200f128im32.h358 #define RTCC ((RTCC_TypeDef *) RTCC_BASE) /**< RTCC base pointer */ macro
Defm32pg1b200f256gm32.h358 #define RTCC ((RTCC_TypeDef *) RTCC_BASE) /**< RTCC base pointer */ macro
Defm32pg1b200f256gm48.h358 #define RTCC ((RTCC_TypeDef *) RTCC_BASE) /**< RTCC base pointer */ macro
Defm32pg1b200f256im32.h358 #define RTCC ((RTCC_TypeDef *) RTCC_BASE) /**< RTCC base pointer */ macro
Defm32pg1b200f256im48.h358 #define RTCC ((RTCC_TypeDef *) RTCC_BASE) /**< RTCC base pointer */ macro
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFR32FG1P/Include/
Defr32fg1p132f64gm32.h372 #define RTCC ((RTCC_TypeDef *) RTCC_BASE) /**< RTCC base pointer */ macro
Defr32fg1p132f64gm48.h372 #define RTCC ((RTCC_TypeDef *) RTCC_BASE) /**< RTCC base pointer */ macro
Defr32fg1p133f128gm48.h372 #define RTCC ((RTCC_TypeDef *) RTCC_BASE) /**< RTCC base pointer */ macro
Defr32fg1p133f256gm32.h372 #define RTCC ((RTCC_TypeDef *) RTCC_BASE) /**< RTCC base pointer */ macro
Defr32fg1p133f256gm48.h372 #define RTCC ((RTCC_TypeDef *) RTCC_BASE) /**< RTCC base pointer */ macro
Defr32fg1p133f64gm48.h372 #define RTCC ((RTCC_TypeDef *) RTCC_BASE) /**< RTCC base pointer */ macro
Defr32fg1p131f128gm32.h372 #define RTCC ((RTCC_TypeDef *) RTCC_BASE) /**< RTCC base pointer */ macro
Defr32fg1p131f128gm48.h372 #define RTCC ((RTCC_TypeDef *) RTCC_BASE) /**< RTCC base pointer */ macro
Defr32fg1p131f256gm32.h372 #define RTCC ((RTCC_TypeDef *) RTCC_BASE) /**< RTCC base pointer */ macro
Defr32fg1p131f256gm48.h372 #define RTCC ((RTCC_TypeDef *) RTCC_BASE) /**< RTCC base pointer */ macro
Defr32fg1p131f256im32.h372 #define RTCC ((RTCC_TypeDef *) RTCC_BASE) /**< RTCC base pointer */ macro

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