| /hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32HG/Include/ |
| D | efm32hg_cmu.h | 71 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
|
| D | efm32hg110f32.h | 276 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
|
| D | efm32hg110f64.h | 276 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
|
| D | efm32hg210f32.h | 276 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
|
| D | efm32hg210f64.h | 276 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
|
| D | efm32hg222f32.h | 276 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
|
| D | efm32hg222f64.h | 276 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
|
| D | efm32hg321f32.h | 320 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
|
| D | efm32hg321f64.h | 320 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
|
| D | efm32hg108f32.h | 307 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
|
| D | efm32hg108f64.h | 307 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
|
| D | efm32hg308f32.h | 315 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
|
| D | efm32hg308f64.h | 315 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
|
| /hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/ |
| D | efm32gg12b_cmu.h | 102 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
|
| D | efm32gg12b390f1024gl112.h | 525 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
|
| D | efm32gg12b390f512gl112.h | 525 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
|
| D | efm32gg12b530f512il120.h | 571 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
|
| D | efm32gg12b530f512im64.h | 571 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
|
| D | efm32gg12b530f512iq100.h | 571 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
|
| D | efm32gg12b530f512iq64.h | 571 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
|
| D | efm32gg12b530f512gm64.h | 571 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
|
| D | efm32gg12b530f512gq100.h | 571 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
|
| D | efm32gg12b530f512gq64.h | 571 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
|
| /hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/ |
| D | efm32gg11b_cmu.h | 102 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
|
| /hal_silabs-3.6.0/gecko/emlib/src/ |
| D | em_cmu.c | 7559 reg = &CMU->LFCCLKEN0; in CMU_ClockEnable()
|
