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Searched refs:EMU_PWRCTRL_ANASW_AVDD (Results 1 – 25 of 72) sorted by relevance

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/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFR32FG1P/Include/
Defr32fg1p_emu.h702 #define EMU_PWRCTRL_ANASW_AVDD (_EMU_PWRCTRL_ANASW_AVDD << 5) /**< Shifted… macro
/hal_silabs-3.6.0/gecko/emlib/inc/
Dem_emu.h274 emuDcdcAnaPeripheralPower_AVDD = EMU_PWRCTRL_ANASW_AVDD,
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32PG1B/Include/
Defm32pg1b_emu.h702 #define EMU_PWRCTRL_ANASW_AVDD (_EMU_PWRCTRL_ANASW_AVDD << 5) /**< Shifted… macro
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_emu.h791 #define EMU_PWRCTRL_ANASW_AVDD (_EMU_PWRCTRL_ANASW_AVDD << 5) … macro
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_emu.h774 #define EMU_PWRCTRL_ANASW_AVDD (_EMU_PWRCTRL_ANASW_AVDD << 5) … macro
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_emu.h774 #define EMU_PWRCTRL_ANASW_AVDD (_EMU_PWRCTRL_ANASW_AVDD << 5) … macro
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_emu.h791 #define EMU_PWRCTRL_ANASW_AVDD (_EMU_PWRCTRL_ANASW_AVDD << 5) … macro
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_emu.h791 #define EMU_PWRCTRL_ANASW_AVDD (_EMU_PWRCTRL_ANASW_AVDD << 5) … macro
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_emu.h902 #define EMU_PWRCTRL_ANASW_AVDD (_EMU_PWRCTRL_ANASW_AVDD << 5) … macro
Defm32gg12b390f1024gl112.h2978 #define EMU_PWRCTRL_ANASW_AVDD (_EMU_PWRCTRL_ANASW_AVDD << 5) … macro
Defm32gg12b390f512gl112.h2978 #define EMU_PWRCTRL_ANASW_AVDD (_EMU_PWRCTRL_ANASW_AVDD << 5) … macro
Defm32gg12b530f512il120.h3817 #define EMU_PWRCTRL_ANASW_AVDD (_EMU_PWRCTRL_ANASW_AVDD << 5) … macro
Defm32gg12b530f512im64.h3817 #define EMU_PWRCTRL_ANASW_AVDD (_EMU_PWRCTRL_ANASW_AVDD << 5) … macro
Defm32gg12b530f512iq100.h3817 #define EMU_PWRCTRL_ANASW_AVDD (_EMU_PWRCTRL_ANASW_AVDD << 5) … macro
Defm32gg12b530f512iq64.h3817 #define EMU_PWRCTRL_ANASW_AVDD (_EMU_PWRCTRL_ANASW_AVDD << 5) … macro
Defm32gg12b530f512gm64.h3817 #define EMU_PWRCTRL_ANASW_AVDD (_EMU_PWRCTRL_ANASW_AVDD << 5) … macro
Defm32gg12b530f512gq100.h3817 #define EMU_PWRCTRL_ANASW_AVDD (_EMU_PWRCTRL_ANASW_AVDD << 5) … macro
Defm32gg12b530f512gq64.h3817 #define EMU_PWRCTRL_ANASW_AVDD (_EMU_PWRCTRL_ANASW_AVDD << 5) … macro
Defm32gg12b530f512il112.h3817 #define EMU_PWRCTRL_ANASW_AVDD (_EMU_PWRCTRL_ANASW_AVDD << 5) … macro
Defm32gg12b110f1024gm64.h3809 #define EMU_PWRCTRL_ANASW_AVDD (_EMU_PWRCTRL_ANASW_AVDD << 5) … macro
Defm32gg12b510f1024gl112.h3817 #define EMU_PWRCTRL_ANASW_AVDD (_EMU_PWRCTRL_ANASW_AVDD << 5) … macro
Defm32gg12b510f1024gl120.h3817 #define EMU_PWRCTRL_ANASW_AVDD (_EMU_PWRCTRL_ANASW_AVDD << 5) … macro
Defm32gg12b510f1024gm64.h3817 #define EMU_PWRCTRL_ANASW_AVDD (_EMU_PWRCTRL_ANASW_AVDD << 5) … macro
Defm32gg12b510f1024gq100.h3817 #define EMU_PWRCTRL_ANASW_AVDD (_EMU_PWRCTRL_ANASW_AVDD << 5) … macro
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_emu.h910 #define EMU_PWRCTRL_ANASW_AVDD (_EMU_PWRCTRL_ANASW_AVDD << 5) … macro

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