DPLL0_NS_BASE (reference) in projects: hal_silabs-3.6.0

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Searched refs:DPLL0_NS_BASE (Results 1 – 25 of 69) sorted by relevance

12 3

/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFR32BG22/Include/
D	efr32bg22c222f352gm40.h	`538 #define DPLL0_NS_BASE (0x5001C000UL) /* DPLL0_NS base address / macro 614 #define DPLL0_BASE (DPLL0_NS_BASE) / DPLL0 base address / 858 #define DPLL0_NS ((DPLL_TypeDef ) DPLL0_NS_BASE) /**< DPLL…`
D	efr32bg22c222f352gn32.h	`524 #define DPLL0_NS_BASE (0x5001C000UL) /* DPLL0_NS base address / macro 600 #define DPLL0_BASE (DPLL0_NS_BASE) / DPLL0 base address / 844 #define DPLL0_NS ((DPLL_TypeDef ) DPLL0_NS_BASE) /**< DPLL…`
D	efr32bg22c224f512gm32.h	`524 #define DPLL0_NS_BASE (0x5001C000UL) /* DPLL0_NS base address / macro 600 #define DPLL0_BASE (DPLL0_NS_BASE) / DPLL0 base address / 844 #define DPLL0_NS ((DPLL_TypeDef ) DPLL0_NS_BASE) /**< DPLL…`
D	efr32bg22c224f512gm40.h	`538 #define DPLL0_NS_BASE (0x5001C000UL) /* DPLL0_NS base address / macro 614 #define DPLL0_BASE (DPLL0_NS_BASE) / DPLL0 base address / 858 #define DPLL0_NS ((DPLL_TypeDef ) DPLL0_NS_BASE) /**< DPLL…`
D	efr32bg22c224f512gn32.h	`524 #define DPLL0_NS_BASE (0x5001C000UL) /* DPLL0_NS base address / macro 600 #define DPLL0_BASE (DPLL0_NS_BASE) / DPLL0 base address / 844 #define DPLL0_NS ((DPLL_TypeDef ) DPLL0_NS_BASE) /**< DPLL…`
D	efr32bg22c224f512im32.h	`524 #define DPLL0_NS_BASE (0x5001C000UL) /* DPLL0_NS base address / macro 600 #define DPLL0_BASE (DPLL0_NS_BASE) / DPLL0 base address / 844 #define DPLL0_NS ((DPLL_TypeDef ) DPLL0_NS_BASE) /**< DPLL…`
D	efr32bg22c224f512im40.h	`538 #define DPLL0_NS_BASE (0x5001C000UL) /* DPLL0_NS base address / macro 614 #define DPLL0_BASE (DPLL0_NS_BASE) / DPLL0 base address / 858 #define DPLL0_NS ((DPLL_TypeDef ) DPLL0_NS_BASE) /**< DPLL…`
D	efr32bg22c112f352gm32.h	`522 #define DPLL0_NS_BASE (0x5001C000UL) /* DPLL0_NS base address / macro 598 #define DPLL0_BASE (DPLL0_NS_BASE) / DPLL0 base address / 842 #define DPLL0_NS ((DPLL_TypeDef ) DPLL0_NS_BASE) /**< DPLL…`
D	efr32bg22c112f352gm40.h	`536 #define DPLL0_NS_BASE (0x5001C000UL) /* DPLL0_NS base address / macro 612 #define DPLL0_BASE (DPLL0_NS_BASE) / DPLL0 base address / 856 #define DPLL0_NS ((DPLL_TypeDef ) DPLL0_NS_BASE) /**< DPLL…`
D	efr32bg22c222f352gm32.h	`524 #define DPLL0_NS_BASE (0x5001C000UL) /* DPLL0_NS base address / macro 600 #define DPLL0_BASE (DPLL0_NS_BASE) / DPLL0 base address / 844 #define DPLL0_NS ((DPLL_TypeDef ) DPLL0_NS_BASE) /**< DPLL…`
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFR32MG21/Include/
D	efr32mg21a010f1024im32.h	`507 #define DPLL0_NS_BASE (0x5001C000UL) /* DPLL0_NS base address / macro 583 #define DPLL0_BASE (DPLL0_NS_BASE) / DPLL0 base address / 827 #define DPLL0_NS ((DPLL_TypeDef ) DPLL0_NS_BASE) /**< DPLL0_NS base…`
D	efr32mg21a010f512im32.h	`507 #define DPLL0_NS_BASE (0x5001C000UL) /* DPLL0_NS base address / macro 583 #define DPLL0_BASE (DPLL0_NS_BASE) / DPLL0 base address / 827 #define DPLL0_NS ((DPLL_TypeDef ) DPLL0_NS_BASE) /**< DPLL0_NS base…`
D	efr32mg21a010f768im32.h	`507 #define DPLL0_NS_BASE (0x5001C000UL) /* DPLL0_NS base address / macro 583 #define DPLL0_BASE (DPLL0_NS_BASE) / DPLL0 base address / 827 #define DPLL0_NS ((DPLL_TypeDef ) DPLL0_NS_BASE) /**< DPLL0_NS base…`
D	efr32mg21a020f1024im32.h	`509 #define DPLL0_NS_BASE (0x5001C000UL) /* DPLL0_NS base address / macro 585 #define DPLL0_BASE (DPLL0_NS_BASE) / DPLL0 base address / 829 #define DPLL0_NS ((DPLL_TypeDef ) DPLL0_NS_BASE) /**< DPLL0_NS base…`
D	efr32mg21a020f512im32.h	`509 #define DPLL0_NS_BASE (0x5001C000UL) /* DPLL0_NS base address / macro 585 #define DPLL0_BASE (DPLL0_NS_BASE) / DPLL0 base address / 829 #define DPLL0_NS ((DPLL_TypeDef ) DPLL0_NS_BASE) /**< DPLL0_NS base…`
D	efr32mg21a020f768im32.h	`509 #define DPLL0_NS_BASE (0x5001C000UL) /* DPLL0_NS base address / macro 585 #define DPLL0_BASE (DPLL0_NS_BASE) / DPLL0 base address / 829 #define DPLL0_NS ((DPLL_TypeDef ) DPLL0_NS_BASE) /**< DPLL0_NS base…`
D	efr32mg21b010f1024im32.h	`507 #define DPLL0_NS_BASE (0x5001C000UL) /* DPLL0_NS base address / macro 583 #define DPLL0_BASE (DPLL0_NS_BASE) / DPLL0 base address / 827 #define DPLL0_NS ((DPLL_TypeDef ) DPLL0_NS_BASE) /**< DPLL0_NS base…`
D	efr32mg21b010f512im32.h	`507 #define DPLL0_NS_BASE (0x5001C000UL) /* DPLL0_NS base address / macro 583 #define DPLL0_BASE (DPLL0_NS_BASE) / DPLL0 base address / 827 #define DPLL0_NS ((DPLL_TypeDef ) DPLL0_NS_BASE) /**< DPLL0_NS base…`
D	efr32mg21b010f768im32.h	`507 #define DPLL0_NS_BASE (0x5001C000UL) /* DPLL0_NS base address / macro 583 #define DPLL0_BASE (DPLL0_NS_BASE) / DPLL0 base address / 827 #define DPLL0_NS ((DPLL_TypeDef ) DPLL0_NS_BASE) /**< DPLL0_NS base…`
D	efr32mg21b020f1024im32.h	`509 #define DPLL0_NS_BASE (0x5001C000UL) /* DPLL0_NS base address / macro 585 #define DPLL0_BASE (DPLL0_NS_BASE) / DPLL0 base address / 829 #define DPLL0_NS ((DPLL_TypeDef ) DPLL0_NS_BASE) /**< DPLL0_NS base…`
D	efr32mg21b020f512im32.h	`509 #define DPLL0_NS_BASE (0x5001C000UL) /* DPLL0_NS base address / macro 585 #define DPLL0_BASE (DPLL0_NS_BASE) / DPLL0 base address / 829 #define DPLL0_NS ((DPLL_TypeDef ) DPLL0_NS_BASE) /**< DPLL0_NS base…`
D	efr32mg21b020f768im32.h	`509 #define DPLL0_NS_BASE (0x5001C000UL) /* DPLL0_NS base address / macro 585 #define DPLL0_BASE (DPLL0_NS_BASE) / DPLL0 base address / 829 #define DPLL0_NS ((DPLL_TypeDef ) DPLL0_NS_BASE) /**< DPLL0_NS base…`
D	rm21z000f1024im32.h	`505 #define DPLL0_NS_BASE (0x5001C000UL) /* DPLL0_NS base address / macro 581 #define DPLL0_BASE (DPLL0_NS_BASE) / DPLL0 base address / 825 #define DPLL0_NS ((DPLL_TypeDef ) DPLL0_NS_BASE) /**< DPLL0_NS base…`
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFR32BG27/Include/
D	efr32bg27c140f768im32.h	`581 #define DPLL0_NS_BASE (0x5001C000UL) /* DPLL0_NS base address / macro 658 #define DPLL0_BASE (DPLL0_NS_BASE) / DPLL0 base address / 908 #define DPLL0_NS ((DPLL_TypeDef ) DPLL0_NS_BASE) /**< DPLL0_NS base po…`
D	efr32bg27c140f768im40.h	`597 #define DPLL0_NS_BASE (0x5001C000UL) /* DPLL0_NS base address / macro 674 #define DPLL0_BASE (DPLL0_NS_BASE) / DPLL0 base address / 924 #define DPLL0_NS ((DPLL_TypeDef ) DPLL0_NS_BASE) /**< DPLL0_NS base po…`

12 3

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
Zephyr-Core-3.4.0
Zephyr-Core-3.5.0
Zephyr-Core-3.6.0
Zephyr-Core-3.7.0
acpica-3.5.0
acpica-3.6.0
acpica-3.7.0
babblesim_base-3.4.0
babblesim_base-3.6.0-3.5.0
babblesim_base-3.7.0
babblesim_ext_2G4_channel_NtNcable-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_channel_multiatt-3.4.0
babblesim_ext_2G4_channel_multiatt-3.7.0-3.6.0-3.5.0
babblesim_ext_2G4_device_WLAN_actmod-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_burst_interferer-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.7.0
babblesim_ext_2G4_libPhyComv1-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_libPhyComv1-3.7.0
babblesim_ext_2G4_modem_BLE_simple-3.4.0
babblesim_ext_2G4_modem_BLE_simple-3.6.0-3.5.0
babblesim_ext_2G4_modem_BLE_simple-3.7.0
babblesim_ext_2G4_modem_magic-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_modem_magic-3.7.0
babblesim_ext_2G4_phy_v1-3.4.0
babblesim_ext_2G4_phy_v1-3.6.0-3.5.0
babblesim_ext_2G4_phy_v1-3.7.0
babblesim_ext_libCryptov1-3.7.0-3.6.0-3.5.0-3.4.0
bsim-3.4.0
bsim-3.6.0-3.5.0
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canopennode-3.5.0-3.4.0
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cmsis-3.4.0
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cmsis-dsp-3.5.0
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cmsis-nn-3.7.0
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fatfs-3.7.0-3.6.0-3.5.0-3.4.0
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hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0
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hal_intel-3.7.0
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