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Searched refs:ALTCTRLBASE (Results 1 – 25 of 36) sorted by relevance

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/hal_silabs-3.6.0/gecko/emlib/src/
Dem_dma.c185 descr = ((DMA_DESCRIPTOR_TypeDef *)(DMA->ALTCTRLBASE)) + channel; in DMA_Prepare()
581 descr->DSTEND = (uint32_t *)((DMA_DESCRIPTOR_TypeDef *)(DMA->ALTCTRLBASE) in DMA_ActivateScatterGather()
742 descr = (DMA_DESCRIPTOR_TypeDef *)DMA->ALTCTRLBASE; in DMA_CfgDescr()
1089 descr = ((DMA_DESCRIPTOR_TypeDef *)(DMA->ALTCTRLBASE)) + channel; in DMA_RefreshPingPong()
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32HG/Include/
Defm32hg_dma.h50 __IM uint32_t ALTCTRLBASE; /**< Channel Alternate Control Data Base Pointer Register */ member
Defm32hg321f32.h252 __IM uint32_t ALTCTRLBASE; /**< Channel Alternate Control Data Base Pointer Register */ member
Defm32hg321f64.h252 __IM uint32_t ALTCTRLBASE; /**< Channel Alternate Control Data Base Pointer Register */ member
Defm32hg108f32.h242 __IM uint32_t ALTCTRLBASE; /**< Channel Alternate Control Data Base Pointer Register */ member
Defm32hg108f64.h242 __IM uint32_t ALTCTRLBASE; /**< Channel Alternate Control Data Base Pointer Register */ member
Defm32hg308f32.h247 __IM uint32_t ALTCTRLBASE; /**< Channel Alternate Control Data Base Pointer Register */ member
Defm32hg308f64.h247 __IM uint32_t ALTCTRLBASE; /**< Channel Alternate Control Data Base Pointer Register */ member
/hal_silabs-3.6.0/gecko/Device/SiliconLabs/EFM32WG/Include/
Defm32wg_dma.h50 __IM uint32_t ALTCTRLBASE; /**< Channel Alternate Control Data Base Pointer Register */ member
Defm32wg360f128.h295 __IM uint32_t ALTCTRLBASE; /**< Channel Alternate Control Data Base Pointer Register */ member
Defm32wg360f256.h295 __IM uint32_t ALTCTRLBASE; /**< Channel Alternate Control Data Base Pointer Register */ member
Defm32wg360f64.h295 __IM uint32_t ALTCTRLBASE; /**< Channel Alternate Control Data Base Pointer Register */ member
Defm32wg940f128.h292 __IM uint32_t ALTCTRLBASE; /**< Channel Alternate Control Data Base Pointer Register */ member
Defm32wg940f256.h292 __IM uint32_t ALTCTRLBASE; /**< Channel Alternate Control Data Base Pointer Register */ member
Defm32wg940f64.h292 __IM uint32_t ALTCTRLBASE; /**< Channel Alternate Control Data Base Pointer Register */ member
Defm32wg942f128.h292 __IM uint32_t ALTCTRLBASE; /**< Channel Alternate Control Data Base Pointer Register */ member
Defm32wg942f256.h292 __IM uint32_t ALTCTRLBASE; /**< Channel Alternate Control Data Base Pointer Register */ member
Defm32wg942f64.h292 __IM uint32_t ALTCTRLBASE; /**< Channel Alternate Control Data Base Pointer Register */ member
Defm32wg232f256.h284 __IM uint32_t ALTCTRLBASE; /**< Channel Alternate Control Data Base Pointer Register */ member
Defm32wg232f64.h284 __IM uint32_t ALTCTRLBASE; /**< Channel Alternate Control Data Base Pointer Register */ member
Defm32wg330f128.h289 __IM uint32_t ALTCTRLBASE; /**< Channel Alternate Control Data Base Pointer Register */ member
Defm32wg330f256.h289 __IM uint32_t ALTCTRLBASE; /**< Channel Alternate Control Data Base Pointer Register */ member
Defm32wg330f64.h289 __IM uint32_t ALTCTRLBASE; /**< Channel Alternate Control Data Base Pointer Register */ member
Defm32wg332f128.h289 __IM uint32_t ALTCTRLBASE; /**< Channel Alternate Control Data Base Pointer Register */ member
Defm32wg332f256.h289 __IM uint32_t ALTCTRLBASE; /**< Channel Alternate Control Data Base Pointer Register */ member

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