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Searched refs:_SMU_PPUSATD1_MASK (Results 1 – 8 of 8) sorted by relevance

/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG27/Source/
Dsystem_efr32bg27.c175 SMU->PPUSATD1_CLR = (_SMU_PPUSATD1_MASK & (~SMU_PPUSATD1_SMU & ~SMU_PPUSATD1_SEMAILBOX)); in SystemInit()
177 SMU->PPUSATD1_CLR = (_SMU_PPUSATD1_MASK & ~SMU_PPUSATD1_SMU); in SystemInit()
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG22/Source/
Dsystem_efr32bg22.c175 SMU->PPUSATD1_CLR = (_SMU_PPUSATD1_MASK & (~SMU_PPUSATD1_SMU & ~SMU_PPUSATD1_SEMAILBOX)); in SystemInit()
177 SMU->PPUSATD1_CLR = (_SMU_PPUSATD1_MASK & ~SMU_PPUSATD1_SMU); in SystemInit()
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG21/Source/
Dsystem_efr32mg21.c175 SMU->PPUSATD1_CLR = (_SMU_PPUSATD1_MASK & (~SMU_PPUSATD1_SMU & ~SMU_PPUSATD1_SEMAILBOX)); in SystemInit()
177 SMU->PPUSATD1_CLR = (_SMU_PPUSATD1_MASK & ~SMU_PPUSATD1_SMU); in SystemInit()
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG24/Source/
Dsystem_efr32mg24.c175 SMU->PPUSATD1_CLR = (_SMU_PPUSATD1_MASK & (~SMU_PPUSATD1_SMU & ~SMU_PPUSATD1_SEMAILBOX)); in SystemInit()
177 SMU->PPUSATD1_CLR = (_SMU_PPUSATD1_MASK & ~SMU_PPUSATD1_SMU); in SystemInit()
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG21/Include/
Defr32mg21_smu.h690 #define _SMU_PPUSATD1_MASK 0x00003FFFUL /**< Mask… macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG22/Include/
Defr32bg22_smu.h695 #define _SMU_PPUSATD1_MASK 0x0000FFFFUL /**< Mask… macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG27/Include/
Defr32bg27_smu.h710 #define _SMU_PPUSATD1_MASK 0x0007FFFFUL /**< Mask… macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG24/Include/
Defr32mg24_smu.h730 #define _SMU_PPUSATD1_MASK 0x003FFFFFUL /**< Mask … macro