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Searched refs:_SMU_PPUPATD1_USART3_MASK (Results 1 – 25 of 67) sorted by relevance

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/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_smu.h295 #define _SMU_PPUPATD1_USART3_MASK 0x800UL /**< Bit mask for … macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_smu.h295 #define _SMU_PPUPATD1_USART3_MASK 0x800UL /**< Bit mask for … macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_smu.h295 #define _SMU_PPUPATD1_USART3_MASK 0x800UL /**< Bit mask for … macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_smu.h371 #define _SMU_PPUPATD1_USART3_MASK 0x100000UL /**< Bit mask for … macro
Defm32gg12b390f1024gl112.h7811 #define _SMU_PPUPATD1_USART3_MASK 0x100000UL /**< Bit mask for … macro
Defm32gg12b390f512gl112.h7811 #define _SMU_PPUPATD1_USART3_MASK 0x100000UL /**< Bit mask for … macro
Defm32gg12b110f1024iq64.h8578 #define _SMU_PPUPATD1_USART3_MASK 0x100000UL /**< Bit mask for … macro
Defm32gg12b510f1024gl120.h8614 #define _SMU_PPUPATD1_USART3_MASK 0x100000UL /**< Bit mask for … macro
Defm32gg12b510f1024gm64.h8614 #define _SMU_PPUPATD1_USART3_MASK 0x100000UL /**< Bit mask for … macro
Defm32gg12b510f1024gl112.h8614 #define _SMU_PPUPATD1_USART3_MASK 0x100000UL /**< Bit mask for … macro
Defm32gg12b530f512im64.h8614 #define _SMU_PPUPATD1_USART3_MASK 0x100000UL /**< Bit mask for … macro
Defm32gg12b530f512iq64.h8614 #define _SMU_PPUPATD1_USART3_MASK 0x100000UL /**< Bit mask for … macro
Defm32gg12b130f512gm64.h8578 #define _SMU_PPUPATD1_USART3_MASK 0x100000UL /**< Bit mask for … macro
Defm32gg12b130f512gq64.h8578 #define _SMU_PPUPATD1_USART3_MASK 0x100000UL /**< Bit mask for … macro
Defm32gg12b130f512im64.h8578 #define _SMU_PPUPATD1_USART3_MASK 0x100000UL /**< Bit mask for … macro
Defm32gg12b130f512iq64.h8578 #define _SMU_PPUPATD1_USART3_MASK 0x100000UL /**< Bit mask for … macro
Defm32gg12b530f512iq100.h8614 #define _SMU_PPUPATD1_USART3_MASK 0x100000UL /**< Bit mask for … macro
Defm32gg12b110f1024gm64.h8578 #define _SMU_PPUPATD1_USART3_MASK 0x100000UL /**< Bit mask for … macro
Defm32gg12b110f1024gq64.h8578 #define _SMU_PPUPATD1_USART3_MASK 0x100000UL /**< Bit mask for … macro
Defm32gg12b510f1024iq100.h8614 #define _SMU_PPUPATD1_USART3_MASK 0x100000UL /**< Bit mask for … macro
Defm32gg12b510f1024gq64.h8614 #define _SMU_PPUPATD1_USART3_MASK 0x100000UL /**< Bit mask for … macro
Defm32gg12b510f1024il112.h8614 #define _SMU_PPUPATD1_USART3_MASK 0x100000UL /**< Bit mask for … macro
Defm32gg12b510f1024im64.h8614 #define _SMU_PPUPATD1_USART3_MASK 0x100000UL /**< Bit mask for … macro
Defm32gg12b510f1024il120.h8614 #define _SMU_PPUPATD1_USART3_MASK 0x100000UL /**< Bit mask for … macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_smu.h396 #define _SMU_PPUPATD1_USART3_MASK 0x400000UL /**< Bit mask for … macro

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