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Searched refs:_SMU_PPUPATD1_UART0_DEFAULT (Results 1 – 25 of 64) sorted by relevance

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/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_smu.h347 #define _SMU_PPUPATD1_UART0_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro
348 #define SMU_PPUPATD1_UART0_DEFAULT (_SMU_PPUPATD1_UART0_DEFAULT << 15) /**< Shifted mode …
Defm32gg12b390f1024gl112.h7787 #define _SMU_PPUPATD1_UART0_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro
7788 #define SMU_PPUPATD1_UART0_DEFAULT (_SMU_PPUPATD1_UART0_DEFAULT << 15) /**< Shifted mode …
Defm32gg12b390f512gl112.h7787 #define _SMU_PPUPATD1_UART0_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro
7788 #define SMU_PPUPATD1_UART0_DEFAULT (_SMU_PPUPATD1_UART0_DEFAULT << 15) /**< Shifted mode …
Defm32gg12b110f1024iq64.h8554 #define _SMU_PPUPATD1_UART0_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro
8555 #define SMU_PPUPATD1_UART0_DEFAULT (_SMU_PPUPATD1_UART0_DEFAULT << 15) /**< Shifted mode …
Defm32gg12b510f1024gl120.h8590 #define _SMU_PPUPATD1_UART0_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro
8591 #define SMU_PPUPATD1_UART0_DEFAULT (_SMU_PPUPATD1_UART0_DEFAULT << 15) /**< Shifted mode …
Defm32gg12b510f1024gm64.h8590 #define _SMU_PPUPATD1_UART0_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro
8591 #define SMU_PPUPATD1_UART0_DEFAULT (_SMU_PPUPATD1_UART0_DEFAULT << 15) /**< Shifted mode …
Defm32gg12b510f1024gl112.h8590 #define _SMU_PPUPATD1_UART0_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro
8591 #define SMU_PPUPATD1_UART0_DEFAULT (_SMU_PPUPATD1_UART0_DEFAULT << 15) /**< Shifted mode …
Defm32gg12b530f512im64.h8590 #define _SMU_PPUPATD1_UART0_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro
8591 #define SMU_PPUPATD1_UART0_DEFAULT (_SMU_PPUPATD1_UART0_DEFAULT << 15) /**< Shifted mode …
Defm32gg12b530f512iq64.h8590 #define _SMU_PPUPATD1_UART0_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro
8591 #define SMU_PPUPATD1_UART0_DEFAULT (_SMU_PPUPATD1_UART0_DEFAULT << 15) /**< Shifted mode …
Defm32gg12b130f512gm64.h8554 #define _SMU_PPUPATD1_UART0_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro
8555 #define SMU_PPUPATD1_UART0_DEFAULT (_SMU_PPUPATD1_UART0_DEFAULT << 15) /**< Shifted mode …
Defm32gg12b130f512gq64.h8554 #define _SMU_PPUPATD1_UART0_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro
8555 #define SMU_PPUPATD1_UART0_DEFAULT (_SMU_PPUPATD1_UART0_DEFAULT << 15) /**< Shifted mode …
Defm32gg12b130f512im64.h8554 #define _SMU_PPUPATD1_UART0_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro
8555 #define SMU_PPUPATD1_UART0_DEFAULT (_SMU_PPUPATD1_UART0_DEFAULT << 15) /**< Shifted mode …
Defm32gg12b130f512iq64.h8554 #define _SMU_PPUPATD1_UART0_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro
8555 #define SMU_PPUPATD1_UART0_DEFAULT (_SMU_PPUPATD1_UART0_DEFAULT << 15) /**< Shifted mode …
Defm32gg12b530f512iq100.h8590 #define _SMU_PPUPATD1_UART0_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro
8591 #define SMU_PPUPATD1_UART0_DEFAULT (_SMU_PPUPATD1_UART0_DEFAULT << 15) /**< Shifted mode …
Defm32gg12b110f1024gm64.h8554 #define _SMU_PPUPATD1_UART0_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro
8555 #define SMU_PPUPATD1_UART0_DEFAULT (_SMU_PPUPATD1_UART0_DEFAULT << 15) /**< Shifted mode …
Defm32gg12b110f1024gq64.h8554 #define _SMU_PPUPATD1_UART0_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro
8555 #define SMU_PPUPATD1_UART0_DEFAULT (_SMU_PPUPATD1_UART0_DEFAULT << 15) /**< Shifted mode …
Defm32gg12b510f1024iq100.h8590 #define _SMU_PPUPATD1_UART0_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro
8591 #define SMU_PPUPATD1_UART0_DEFAULT (_SMU_PPUPATD1_UART0_DEFAULT << 15) /**< Shifted mode …
Defm32gg12b510f1024gq64.h8590 #define _SMU_PPUPATD1_UART0_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro
8591 #define SMU_PPUPATD1_UART0_DEFAULT (_SMU_PPUPATD1_UART0_DEFAULT << 15) /**< Shifted mode …
Defm32gg12b510f1024il112.h8590 #define _SMU_PPUPATD1_UART0_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro
8591 #define SMU_PPUPATD1_UART0_DEFAULT (_SMU_PPUPATD1_UART0_DEFAULT << 15) /**< Shifted mode …
Defm32gg12b510f1024im64.h8590 #define _SMU_PPUPATD1_UART0_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro
8591 #define SMU_PPUPATD1_UART0_DEFAULT (_SMU_PPUPATD1_UART0_DEFAULT << 15) /**< Shifted mode …
Defm32gg12b510f1024il120.h8590 #define _SMU_PPUPATD1_UART0_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro
8591 #define SMU_PPUPATD1_UART0_DEFAULT (_SMU_PPUPATD1_UART0_DEFAULT << 15) /**< Shifted mode …
Defm32gg12b510f1024gq100.h8590 #define _SMU_PPUPATD1_UART0_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro
8591 #define SMU_PPUPATD1_UART0_DEFAULT (_SMU_PPUPATD1_UART0_DEFAULT << 15) /**< Shifted mode …
Defm32gg12b530f512gm64.h8590 #define _SMU_PPUPATD1_UART0_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro
8591 #define SMU_PPUPATD1_UART0_DEFAULT (_SMU_PPUPATD1_UART0_DEFAULT << 15) /**< Shifted mode …
Defm32gg12b530f512gl120.h8590 #define _SMU_PPUPATD1_UART0_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro
8591 #define SMU_PPUPATD1_UART0_DEFAULT (_SMU_PPUPATD1_UART0_DEFAULT << 15) /**< Shifted mode …
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_smu.h372 #define _SMU_PPUPATD1_UART0_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro
373 #define SMU_PPUPATD1_UART0_DEFAULT (_SMU_PPUPATD1_UART0_DEFAULT << 17) /**< Shifted mode …

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