/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32FG13P/Include/ |
D | efr32fg13p_smu.h | 266 #define _SMU_PPUPATD1_TIMER1_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro 267 #define SMU_PPUPATD1_TIMER1_DEFAULT (_SMU_PPUPATD1_TIMER1_DEFAULT << 5) /**< Shifted mode …
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/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG13P/Include/ |
D | efr32bg13p_smu.h | 266 #define _SMU_PPUPATD1_TIMER1_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro 267 #define SMU_PPUPATD1_TIMER1_DEFAULT (_SMU_PPUPATD1_TIMER1_DEFAULT << 5) /**< Shifted mode …
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/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32PG12B/Include/ |
D | efm32pg12b_smu.h | 271 #define _SMU_PPUPATD1_TIMER1_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro 272 #define SMU_PPUPATD1_TIMER1_DEFAULT (_SMU_PPUPATD1_TIMER1_DEFAULT << 6) /**< Shifted mode …
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/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG12P/Include/ |
D | efr32mg12p_smu.h | 271 #define _SMU_PPUPATD1_TIMER1_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro 272 #define SMU_PPUPATD1_TIMER1_DEFAULT (_SMU_PPUPATD1_TIMER1_DEFAULT << 6) /**< Shifted mode …
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/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32JG12B/Include/ |
D | efm32jg12b_smu.h | 271 #define _SMU_PPUPATD1_TIMER1_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro 272 #define SMU_PPUPATD1_TIMER1_DEFAULT (_SMU_PPUPATD1_TIMER1_DEFAULT << 6) /**< Shifted mode …
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/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/ |
D | efm32gg12b_smu.h | 327 #define _SMU_PPUPATD1_TIMER1_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro 328 #define SMU_PPUPATD1_TIMER1_DEFAULT (_SMU_PPUPATD1_TIMER1_DEFAULT << 11) /**< Shifted mode …
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D | efm32gg12b390f1024gl112.h | 7767 #define _SMU_PPUPATD1_TIMER1_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro 7768 #define SMU_PPUPATD1_TIMER1_DEFAULT (_SMU_PPUPATD1_TIMER1_DEFAULT << 11) /**< Shifted mode …
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D | efm32gg12b390f512gl112.h | 7767 #define _SMU_PPUPATD1_TIMER1_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro 7768 #define SMU_PPUPATD1_TIMER1_DEFAULT (_SMU_PPUPATD1_TIMER1_DEFAULT << 11) /**< Shifted mode …
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D | efm32gg12b110f1024iq64.h | 8534 #define _SMU_PPUPATD1_TIMER1_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro 8535 #define SMU_PPUPATD1_TIMER1_DEFAULT (_SMU_PPUPATD1_TIMER1_DEFAULT << 11) /**< Shifted mode …
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D | efm32gg12b510f1024gl120.h | 8570 #define _SMU_PPUPATD1_TIMER1_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro 8571 #define SMU_PPUPATD1_TIMER1_DEFAULT (_SMU_PPUPATD1_TIMER1_DEFAULT << 11) /**< Shifted mode …
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D | efm32gg12b510f1024gm64.h | 8570 #define _SMU_PPUPATD1_TIMER1_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro 8571 #define SMU_PPUPATD1_TIMER1_DEFAULT (_SMU_PPUPATD1_TIMER1_DEFAULT << 11) /**< Shifted mode …
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D | efm32gg12b510f1024gl112.h | 8570 #define _SMU_PPUPATD1_TIMER1_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro 8571 #define SMU_PPUPATD1_TIMER1_DEFAULT (_SMU_PPUPATD1_TIMER1_DEFAULT << 11) /**< Shifted mode …
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D | efm32gg12b530f512im64.h | 8570 #define _SMU_PPUPATD1_TIMER1_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro 8571 #define SMU_PPUPATD1_TIMER1_DEFAULT (_SMU_PPUPATD1_TIMER1_DEFAULT << 11) /**< Shifted mode …
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D | efm32gg12b530f512iq64.h | 8570 #define _SMU_PPUPATD1_TIMER1_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro 8571 #define SMU_PPUPATD1_TIMER1_DEFAULT (_SMU_PPUPATD1_TIMER1_DEFAULT << 11) /**< Shifted mode …
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D | efm32gg12b130f512gm64.h | 8534 #define _SMU_PPUPATD1_TIMER1_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro 8535 #define SMU_PPUPATD1_TIMER1_DEFAULT (_SMU_PPUPATD1_TIMER1_DEFAULT << 11) /**< Shifted mode …
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D | efm32gg12b130f512gq64.h | 8534 #define _SMU_PPUPATD1_TIMER1_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro 8535 #define SMU_PPUPATD1_TIMER1_DEFAULT (_SMU_PPUPATD1_TIMER1_DEFAULT << 11) /**< Shifted mode …
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D | efm32gg12b130f512im64.h | 8534 #define _SMU_PPUPATD1_TIMER1_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro 8535 #define SMU_PPUPATD1_TIMER1_DEFAULT (_SMU_PPUPATD1_TIMER1_DEFAULT << 11) /**< Shifted mode …
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D | efm32gg12b130f512iq64.h | 8534 #define _SMU_PPUPATD1_TIMER1_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro 8535 #define SMU_PPUPATD1_TIMER1_DEFAULT (_SMU_PPUPATD1_TIMER1_DEFAULT << 11) /**< Shifted mode …
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D | efm32gg12b530f512iq100.h | 8570 #define _SMU_PPUPATD1_TIMER1_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro 8571 #define SMU_PPUPATD1_TIMER1_DEFAULT (_SMU_PPUPATD1_TIMER1_DEFAULT << 11) /**< Shifted mode …
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D | efm32gg12b110f1024gm64.h | 8534 #define _SMU_PPUPATD1_TIMER1_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro 8535 #define SMU_PPUPATD1_TIMER1_DEFAULT (_SMU_PPUPATD1_TIMER1_DEFAULT << 11) /**< Shifted mode …
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D | efm32gg12b110f1024gq64.h | 8534 #define _SMU_PPUPATD1_TIMER1_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro 8535 #define SMU_PPUPATD1_TIMER1_DEFAULT (_SMU_PPUPATD1_TIMER1_DEFAULT << 11) /**< Shifted mode …
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D | efm32gg12b510f1024iq100.h | 8570 #define _SMU_PPUPATD1_TIMER1_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro 8571 #define SMU_PPUPATD1_TIMER1_DEFAULT (_SMU_PPUPATD1_TIMER1_DEFAULT << 11) /**< Shifted mode …
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D | efm32gg12b510f1024gq64.h | 8570 #define _SMU_PPUPATD1_TIMER1_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro 8571 #define SMU_PPUPATD1_TIMER1_DEFAULT (_SMU_PPUPATD1_TIMER1_DEFAULT << 11) /**< Shifted mode …
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D | efm32gg12b510f1024il112.h | 8570 #define _SMU_PPUPATD1_TIMER1_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro 8571 #define SMU_PPUPATD1_TIMER1_DEFAULT (_SMU_PPUPATD1_TIMER1_DEFAULT << 11) /**< Shifted mode …
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/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/ |
D | efm32gg11b_smu.h | 337 #define _SMU_PPUPATD1_TIMER1_DEFAULT 0x00000000UL /**< Mode DEFAULT … macro 338 #define SMU_PPUPATD1_TIMER1_DEFAULT (_SMU_PPUPATD1_TIMER1_DEFAULT << 10) /**< Shifted mode …
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