/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32FG13P/Include/ |
D | efr32fg13p_smu.h | 172 #define _SMU_PPUPATD0_EMU_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 173 #define SMU_PPUPATD0_EMU_DEFAULT (_SMU_PPUPATD0_EMU_DEFAULT << 13) /**< Shifted mode…
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/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG13P/Include/ |
D | efr32bg13p_smu.h | 172 #define _SMU_PPUPATD0_EMU_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 173 #define SMU_PPUPATD0_EMU_DEFAULT (_SMU_PPUPATD0_EMU_DEFAULT << 13) /**< Shifted mode…
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/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32PG12B/Include/ |
D | efm32pg12b_smu.h | 172 #define _SMU_PPUPATD0_EMU_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 173 #define SMU_PPUPATD0_EMU_DEFAULT (_SMU_PPUPATD0_EMU_DEFAULT << 13) /**< Shifted mode…
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/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG12P/Include/ |
D | efr32mg12p_smu.h | 172 #define _SMU_PPUPATD0_EMU_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 173 #define SMU_PPUPATD0_EMU_DEFAULT (_SMU_PPUPATD0_EMU_DEFAULT << 13) /**< Shifted mode…
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/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32JG12B/Include/ |
D | efm32jg12b_smu.h | 172 #define _SMU_PPUPATD0_EMU_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 173 #define SMU_PPUPATD0_EMU_DEFAULT (_SMU_PPUPATD0_EMU_DEFAULT << 13) /**< Shifted mode…
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/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/ |
D | efm32gg12b_smu.h | 193 #define _SMU_PPUPATD0_EMU_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 194 #define SMU_PPUPATD0_EMU_DEFAULT (_SMU_PPUPATD0_EMU_DEFAULT << 14) /**< Shifted mode…
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D | efm32gg12b390f1024gl112.h | 7638 #define _SMU_PPUPATD0_EMU_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 7639 #define SMU_PPUPATD0_EMU_DEFAULT (_SMU_PPUPATD0_EMU_DEFAULT << 14) /**< Shifted mode…
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D | efm32gg12b390f512gl112.h | 7638 #define _SMU_PPUPATD0_EMU_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 7639 #define SMU_PPUPATD0_EMU_DEFAULT (_SMU_PPUPATD0_EMU_DEFAULT << 14) /**< Shifted mode…
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D | efm32gg12b110f1024iq64.h | 8415 #define _SMU_PPUPATD0_EMU_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 8416 #define SMU_PPUPATD0_EMU_DEFAULT (_SMU_PPUPATD0_EMU_DEFAULT << 14) /**< Shifted mode…
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D | efm32gg12b510f1024gl120.h | 8446 #define _SMU_PPUPATD0_EMU_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 8447 #define SMU_PPUPATD0_EMU_DEFAULT (_SMU_PPUPATD0_EMU_DEFAULT << 14) /**< Shifted mode…
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D | efm32gg12b510f1024gm64.h | 8446 #define _SMU_PPUPATD0_EMU_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 8447 #define SMU_PPUPATD0_EMU_DEFAULT (_SMU_PPUPATD0_EMU_DEFAULT << 14) /**< Shifted mode…
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D | efm32gg12b510f1024gl112.h | 8446 #define _SMU_PPUPATD0_EMU_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 8447 #define SMU_PPUPATD0_EMU_DEFAULT (_SMU_PPUPATD0_EMU_DEFAULT << 14) /**< Shifted mode…
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D | efm32gg12b530f512im64.h | 8446 #define _SMU_PPUPATD0_EMU_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 8447 #define SMU_PPUPATD0_EMU_DEFAULT (_SMU_PPUPATD0_EMU_DEFAULT << 14) /**< Shifted mode…
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D | efm32gg12b530f512iq64.h | 8446 #define _SMU_PPUPATD0_EMU_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 8447 #define SMU_PPUPATD0_EMU_DEFAULT (_SMU_PPUPATD0_EMU_DEFAULT << 14) /**< Shifted mode…
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D | efm32gg12b130f512gm64.h | 8415 #define _SMU_PPUPATD0_EMU_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 8416 #define SMU_PPUPATD0_EMU_DEFAULT (_SMU_PPUPATD0_EMU_DEFAULT << 14) /**< Shifted mode…
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D | efm32gg12b130f512gq64.h | 8415 #define _SMU_PPUPATD0_EMU_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 8416 #define SMU_PPUPATD0_EMU_DEFAULT (_SMU_PPUPATD0_EMU_DEFAULT << 14) /**< Shifted mode…
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D | efm32gg12b130f512im64.h | 8415 #define _SMU_PPUPATD0_EMU_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 8416 #define SMU_PPUPATD0_EMU_DEFAULT (_SMU_PPUPATD0_EMU_DEFAULT << 14) /**< Shifted mode…
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D | efm32gg12b130f512iq64.h | 8415 #define _SMU_PPUPATD0_EMU_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 8416 #define SMU_PPUPATD0_EMU_DEFAULT (_SMU_PPUPATD0_EMU_DEFAULT << 14) /**< Shifted mode…
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D | efm32gg12b530f512iq100.h | 8446 #define _SMU_PPUPATD0_EMU_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 8447 #define SMU_PPUPATD0_EMU_DEFAULT (_SMU_PPUPATD0_EMU_DEFAULT << 14) /**< Shifted mode…
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D | efm32gg12b110f1024gm64.h | 8415 #define _SMU_PPUPATD0_EMU_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 8416 #define SMU_PPUPATD0_EMU_DEFAULT (_SMU_PPUPATD0_EMU_DEFAULT << 14) /**< Shifted mode…
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/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/ |
D | efm32gg11b_smu.h | 198 #define _SMU_PPUPATD0_EMU_DEFAULT 0x00000000UL /**< Mode DEFAULT… macro 199 #define SMU_PPUPATD0_EMU_DEFAULT (_SMU_PPUPATD0_EMU_DEFAULT << 15) /**< Shifted mode…
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/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG21/Include/ |
D | efr32mg21_smu.h | 302 #define _SMU_PPUPATD0_EMU_DEFAULT 0x00000000UL /**< M… macro 303 #define SMU_PPUPATD0_EMU_DEFAULT (_SMU_PPUPATD0_EMU_DEFAULT << 1) /**< S…
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/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG22/Include/ |
D | efr32bg22_smu.h | 302 #define _SMU_PPUPATD0_EMU_DEFAULT 0x00000001UL /**< M… macro 303 #define SMU_PPUPATD0_EMU_DEFAULT (_SMU_PPUPATD0_EMU_DEFAULT << 1) /**< S…
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/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG27/Include/ |
D | efr32bg27_smu.h | 302 #define _SMU_PPUPATD0_EMU_DEFAULT 0x00000001UL /**< M… macro 303 #define SMU_PPUPATD0_EMU_DEFAULT (_SMU_PPUPATD0_EMU_DEFAULT << 1) /**< S…
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/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG24/Include/ |
D | efr32mg24_smu.h | 302 #define _SMU_PPUPATD0_EMU_DEFAULT 0x00000001UL /**< Mo… macro 303 #define SMU_PPUPATD0_EMU_DEFAULT (_SMU_PPUPATD0_EMU_DEFAULT << 1) /**< Sh…
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