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Searched refs:_SMU_PPUFS_PERIPHID_EMU (Results 1 – 25 of 69) sorted by relevance

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/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_smu.h320 #define _SMU_PPUFS_PERIPHID_EMU 0x0000000DUL /**< Mode EMU for S… macro
357 #define SMU_PPUFS_PERIPHID_EMU (_SMU_PPUFS_PERIPHID_EMU << 0) /**< Shifted mode E…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_smu.h320 #define _SMU_PPUFS_PERIPHID_EMU 0x0000000DUL /**< Mode EMU for S… macro
357 #define SMU_PPUFS_PERIPHID_EMU (_SMU_PPUFS_PERIPHID_EMU << 0) /**< Shifted mode E…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_smu.h335 #define _SMU_PPUFS_PERIPHID_EMU 0x0000000DUL /**< Mode EMU for S… macro
375 #define SMU_PPUFS_PERIPHID_EMU (_SMU_PPUFS_PERIPHID_EMU << 0) /**< Shifted mode E…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_smu.h335 #define _SMU_PPUFS_PERIPHID_EMU 0x0000000DUL /**< Mode EMU for S… macro
375 #define SMU_PPUFS_PERIPHID_EMU (_SMU_PPUFS_PERIPHID_EMU << 0) /**< Shifted mode E…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_smu.h335 #define _SMU_PPUFS_PERIPHID_EMU 0x0000000DUL /**< Mode EMU for S… macro
375 #define SMU_PPUFS_PERIPHID_EMU (_SMU_PPUFS_PERIPHID_EMU << 0) /**< Shifted mode E…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_smu.h429 #define _SMU_PPUFS_PERIPHID_EMU 0x0000000EUL /**< Mode EMU for S… macro
486 #define SMU_PPUFS_PERIPHID_EMU (_SMU_PPUFS_PERIPHID_EMU << 0) /**< Shifted mode E…
Defm32gg12b390f1024gl112.h7864 #define _SMU_PPUFS_PERIPHID_EMU 0x0000000EUL /**< Mode EMU for S… macro
7919 #define SMU_PPUFS_PERIPHID_EMU (_SMU_PPUFS_PERIPHID_EMU << 0) /**< Shifted mode E…
Defm32gg12b390f512gl112.h7864 #define _SMU_PPUFS_PERIPHID_EMU 0x0000000EUL /**< Mode EMU for S… macro
7919 #define SMU_PPUFS_PERIPHID_EMU (_SMU_PPUFS_PERIPHID_EMU << 0) /**< Shifted mode E…
Defm32gg12b110f1024iq64.h8631 #define _SMU_PPUFS_PERIPHID_EMU 0x0000000EUL /**< Mode EMU for S… macro
8684 #define SMU_PPUFS_PERIPHID_EMU (_SMU_PPUFS_PERIPHID_EMU << 0) /**< Shifted mode E…
Defm32gg12b510f1024gl120.h8667 #define _SMU_PPUFS_PERIPHID_EMU 0x0000000EUL /**< Mode EMU for S… macro
8721 #define SMU_PPUFS_PERIPHID_EMU (_SMU_PPUFS_PERIPHID_EMU << 0) /**< Shifted mode E…
Defm32gg12b510f1024gm64.h8667 #define _SMU_PPUFS_PERIPHID_EMU 0x0000000EUL /**< Mode EMU for S… macro
8721 #define SMU_PPUFS_PERIPHID_EMU (_SMU_PPUFS_PERIPHID_EMU << 0) /**< Shifted mode E…
Defm32gg12b510f1024gl112.h8667 #define _SMU_PPUFS_PERIPHID_EMU 0x0000000EUL /**< Mode EMU for S… macro
8721 #define SMU_PPUFS_PERIPHID_EMU (_SMU_PPUFS_PERIPHID_EMU << 0) /**< Shifted mode E…
Defm32gg12b530f512im64.h8667 #define _SMU_PPUFS_PERIPHID_EMU 0x0000000EUL /**< Mode EMU for S… macro
8721 #define SMU_PPUFS_PERIPHID_EMU (_SMU_PPUFS_PERIPHID_EMU << 0) /**< Shifted mode E…
Defm32gg12b530f512iq64.h8667 #define _SMU_PPUFS_PERIPHID_EMU 0x0000000EUL /**< Mode EMU for S… macro
8721 #define SMU_PPUFS_PERIPHID_EMU (_SMU_PPUFS_PERIPHID_EMU << 0) /**< Shifted mode E…
Defm32gg12b130f512gm64.h8631 #define _SMU_PPUFS_PERIPHID_EMU 0x0000000EUL /**< Mode EMU for S… macro
8684 #define SMU_PPUFS_PERIPHID_EMU (_SMU_PPUFS_PERIPHID_EMU << 0) /**< Shifted mode E…
Defm32gg12b130f512gq64.h8631 #define _SMU_PPUFS_PERIPHID_EMU 0x0000000EUL /**< Mode EMU for S… macro
8684 #define SMU_PPUFS_PERIPHID_EMU (_SMU_PPUFS_PERIPHID_EMU << 0) /**< Shifted mode E…
Defm32gg12b130f512im64.h8631 #define _SMU_PPUFS_PERIPHID_EMU 0x0000000EUL /**< Mode EMU for S… macro
8684 #define SMU_PPUFS_PERIPHID_EMU (_SMU_PPUFS_PERIPHID_EMU << 0) /**< Shifted mode E…
Defm32gg12b130f512iq64.h8631 #define _SMU_PPUFS_PERIPHID_EMU 0x0000000EUL /**< Mode EMU for S… macro
8684 #define SMU_PPUFS_PERIPHID_EMU (_SMU_PPUFS_PERIPHID_EMU << 0) /**< Shifted mode E…
Defm32gg12b530f512iq100.h8667 #define _SMU_PPUFS_PERIPHID_EMU 0x0000000EUL /**< Mode EMU for S… macro
8721 #define SMU_PPUFS_PERIPHID_EMU (_SMU_PPUFS_PERIPHID_EMU << 0) /**< Shifted mode E…
Defm32gg12b110f1024gm64.h8631 #define _SMU_PPUFS_PERIPHID_EMU 0x0000000EUL /**< Mode EMU for S… macro
8684 #define SMU_PPUFS_PERIPHID_EMU (_SMU_PPUFS_PERIPHID_EMU << 0) /**< Shifted mode E…
Defm32gg12b110f1024gq64.h8631 #define _SMU_PPUFS_PERIPHID_EMU 0x0000000EUL /**< Mode EMU for S… macro
8684 #define SMU_PPUFS_PERIPHID_EMU (_SMU_PPUFS_PERIPHID_EMU << 0) /**< Shifted mode E…
Defm32gg12b510f1024iq100.h8667 #define _SMU_PPUFS_PERIPHID_EMU 0x0000000EUL /**< Mode EMU for S… macro
8721 #define SMU_PPUFS_PERIPHID_EMU (_SMU_PPUFS_PERIPHID_EMU << 0) /**< Shifted mode E…
Defm32gg12b510f1024gq64.h8667 #define _SMU_PPUFS_PERIPHID_EMU 0x0000000EUL /**< Mode EMU for S… macro
8721 #define SMU_PPUFS_PERIPHID_EMU (_SMU_PPUFS_PERIPHID_EMU << 0) /**< Shifted mode E…
Defm32gg12b510f1024il112.h8667 #define _SMU_PPUFS_PERIPHID_EMU 0x0000000EUL /**< Mode EMU for S… macro
8721 #define SMU_PPUFS_PERIPHID_EMU (_SMU_PPUFS_PERIPHID_EMU << 0) /**< Shifted mode E…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_smu.h470 #define _SMU_PPUFS_PERIPHID_EMU 0x0000000FUL /**< Mode EMU for S… macro
535 #define SMU_PPUFS_PERIPHID_EMU (_SMU_PPUFS_PERIPHID_EMU << 0) /**< Shifted mode E…

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