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Searched refs:_RTCC_CFG_CNTPRESC_DIV4096 (Results 1 – 4 of 4) sorted by relevance

/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG22/Include/
Defr32bg22_rtcc.h181 #define _RTCC_CFG_CNTPRESC_DIV4096 0x0000000CUL /**< Mode D… macro
198 #define RTCC_CFG_CNTPRESC_DIV4096 (_RTCC_CFG_CNTPRESC_DIV4096 << 4) /**< Shifte…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG27/Include/
Defr32bg27_rtcc.h181 #define _RTCC_CFG_CNTPRESC_DIV4096 0x0000000CUL /**< Mode D… macro
198 #define RTCC_CFG_CNTPRESC_DIV4096 (_RTCC_CFG_CNTPRESC_DIV4096 << 4) /**< Shifte…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG21/Include/
Defr32mg21_rtcc.h181 #define _RTCC_CFG_CNTPRESC_DIV4096 0x0000000CUL /**< Mode D… macro
198 #define RTCC_CFG_CNTPRESC_DIV4096 (_RTCC_CFG_CNTPRESC_DIV4096 << 4) /**< Shifte…
/hal_silabs-3.5.0/gecko/emlib/inc/
Dem_rtcc.h115 rtccCntPresc_4096 = _RTCC_CFG_CNTPRESC_DIV4096, /**< Divide clock by 4096. */