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Searched refs:_PRS_ASYNC_CH_CTRL_SOURCESEL_GPIO (Results 1 – 4 of 4) sorted by relevance

/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG21/Include/
Defr32mg21_prs_signals.h130 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_GPIO (0x00000005UL) macro
177 #define PRS_ASYNC_CH_CTRL_SOURCESEL_GPIO (_PRS_ASYNC_CH_CTRL_SOURCESEL_GPIO << …
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG22/Include/
Defr32bg22_prs_signals.h147 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_GPIO (0x00000005UL) macro
194 #define PRS_ASYNC_CH_CTRL_SOURCESEL_GPIO (_PRS_ASYNC_CH_CTRL_SOURCESEL_GPIO << 8)
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG27/Include/
Defr32bg27_prs_signals.h147 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_GPIO (0x00000005UL) macro
198 #define PRS_ASYNC_CH_CTRL_SOURCESEL_GPIO (_PRS_ASYNC_CH_CTRL_SOURCESEL_GPIO <…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG24/Include/
Defr32mg24_prs_signals.h162 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_GPIO (0x00000004UL) macro
215 #define PRS_ASYNC_CH_CTRL_SOURCESEL_GPIO (_PRS_ASYNC_CH_CTRL_SOURCESEL_GPIO << 8)