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Searched refs:_PRS_ASYNC_CH_CTRL_SOURCESEL_EUSART0L (Results 1 – 2 of 2) sorted by relevance

/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG27/Include/
Defr32bg27_prs_signals.h156 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_EUSART0L (0x0000000eUL) macro
225 …e PRS_ASYNC_CH_CTRL_SOURCESEL_EUSART0L (_PRS_ASYNC_CH_CTRL_SOURCESEL_EUSART0L <<…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG24/Include/
Defr32mg24_prs_signals.h174 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_EUSART0L (0x00000010UL) macro
243 #define PRS_ASYNC_CH_CTRL_SOURCESEL_EUSART0L (_PRS_ASYNC_CH_CTRL_SOURCESEL_EUSART0L <…