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Searched refs:_PRS_ASYNC_CH_CTRL_SOURCESEL_EMU (Results 1 – 4 of 4) sorted by relevance

/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG21/Include/
Defr32mg21_prs_signals.h139 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_EMU (0x0000000eUL) macro
204 #define PRS_ASYNC_CH_CTRL_SOURCESEL_EMU (_PRS_ASYNC_CH_CTRL_SOURCESEL_EMU << 8)
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG22/Include/
Defr32bg22_prs_signals.h156 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_EMU (0x0000000eUL) macro
223 #define PRS_ASYNC_CH_CTRL_SOURCESEL_EMU (_PRS_ASYNC_CH_CTRL_SOURCESEL_EMU << 8)
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG27/Include/
Defr32bg27_prs_signals.h160 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_EMU (0x00000012UL) macro
231 #define PRS_ASYNC_CH_CTRL_SOURCESEL_EMU (_PRS_ASYNC_CH_CTRL_SOURCESEL_EMU <<…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG24/Include/
Defr32mg24_prs_signals.h181 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_EMU (0x00000017UL) macro
253 #define PRS_ASYNC_CH_CTRL_SOURCESEL_EMU (_PRS_ASYNC_CH_CTRL_SOURCESEL_EMU << 8)