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Searched refs:_PRS_ASYNC_CH_CTRL_SIGSEL_TIMER0UF (Results 1 – 4 of 4) sorted by relevance

/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG21/Include/
Defr32mg21_prs_signals.h227 #define _PRS_ASYNC_CH_CTRL_SIGSEL_TIMER0UF (0x00000000UL) macro
368 #define PRS_ASYNC_CH_CTRL_SIGSEL_TIMER0UF (_PRS_ASYNC_CH_CTRL_SIGSEL_TIMER0UF <<…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG22/Include/
Defr32bg22_prs_signals.h240 #define _PRS_ASYNC_CH_CTRL_SIGSEL_TIMER0UF (0x00000000UL) macro
395 #define PRS_ASYNC_CH_CTRL_SIGSEL_TIMER0UF (_PRS_ASYNC_CH_CTRL_SIGSEL_TIMER0UF << 0)
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG27/Include/
Defr32bg27_prs_signals.h248 #define _PRS_ASYNC_CH_CTRL_SIGSEL_TIMER0UF (0x00000000UL) macro
409 #define PRS_ASYNC_CH_CTRL_SIGSEL_TIMER0UF (_PRS_ASYNC_CH_CTRL_SIGSEL_TIMER0UF
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG24/Include/
Defr32mg24_prs_signals.h264 #define _PRS_ASYNC_CH_CTRL_SIGSEL_TIMER0UF (0x00000000UL) macro
443 #define PRS_ASYNC_CH_CTRL_SIGSEL_TIMER0UF (_PRS_ASYNC_CH_CTRL_SIGSEL_TIMER0UF << 0)