_MSC_READCTRL_MODE_WS1 (reference) in projects: hal_silabs-3.5.0

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Searched refs:_MSC_READCTRL_MODE_WS1 (Results 1 – 25 of 75) sorted by relevance

12 3

/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32HG/Include/
D	efm32hg_msc.h	`97 #define _MSC_READCTRL_MODE_WS1 0x00000001UL /< Mode WS1 f… macro 100 #define MSC_READCTRL_MODE_WS1 (_MSC_READCTRL_MODE_WS1 << 0) /< Shifted mo…`
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32WG/Include/
D	efm32wg_msc.h	`96 #define _MSC_READCTRL_MODE_WS1 0x00000001UL /< Mode… macro 103 #define MSC_READCTRL_MODE_WS1 (_MSC_READCTRL_MODE_WS1 << 0) /< Shif…`
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32PG1B/Include/
D	efm32pg1b_msc.h	`140 #define _MSC_READCTRL_MODE_WS1 0x00000001UL /< Mode WS1… macro 143 #define MSC_READCTRL_MODE_WS1 (_MSC_READCTRL_MODE_WS1 << 24) /< Shifted …`
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32FG1P/Include/
D	efr32fg1p_msc.h	`140 #define _MSC_READCTRL_MODE_WS1 0x00000001UL /< Mode WS1… macro 143 #define MSC_READCTRL_MODE_WS1 (_MSC_READCTRL_MODE_WS1 << 24) /< Shifted …`
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG21/Include/
D	efr32mg21_msc.h	`191 #define _MSC_READCTRL_MODE_WS1 0x00000001UL /< Mode… macro 196 #define MSC_READCTRL_MODE_WS1 (_MSC_READCTRL_MODE_WS1 << 20) /< Shif…`
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG27/Include/
D	efr32bg27_msc.h	`186 #define _MSC_READCTRL_MODE_WS1 0x00000001UL /< Mode W… macro 191 #define MSC_READCTRL_MODE_WS1 (_MSC_READCTRL_MODE_WS1 << 20) /< Shifte…`
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG22/Include/
D	efr32bg22_msc.h	`187 #define _MSC_READCTRL_MODE_WS1 0x00000001UL /< Mode… macro 192 #define MSC_READCTRL_MODE_WS1 (_MSC_READCTRL_MODE_WS1 << 20) /< Shif…`
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32FG13P/Include/
D	efr32fg13p_msc.h	`150 #define _MSC_READCTRL_MODE_WS1 0x00000001UL /< Mo… macro 155 #define MSC_READCTRL_MODE_WS1 (_MSC_READCTRL_MODE_WS1 << 24) /< Sh…`
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG13P/Include/
D	efr32bg13p_msc.h	`150 #define _MSC_READCTRL_MODE_WS1 0x00000001UL /< Mo… macro 155 #define MSC_READCTRL_MODE_WS1 (_MSC_READCTRL_MODE_WS1 << 24) /< Sh…`
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG24/Include/
D	efr32mg24_msc.h	`202 #define _MSC_READCTRL_MODE_WS1 0x00000001UL /< Mode W… macro 207 #define MSC_READCTRL_MODE_WS1 (_MSC_READCTRL_MODE_WS1 << 20) /< Shifte…`
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32PG12B/Include/
D	efm32pg12b_msc.h	`154 #define _MSC_READCTRL_MODE_WS1 0x00000001UL /… macro 159 #define MSC_READCTRL_MODE_WS1 (_MSC_READCTRL_MODE_WS1 << 24) /…`
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32JG12B/Include/
D	efm32jg12b_msc.h	`154 #define _MSC_READCTRL_MODE_WS1 0x00000001UL /… macro 159 #define MSC_READCTRL_MODE_WS1 (_MSC_READCTRL_MODE_WS1 << 24) /…`
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG12P/Include/
D	efr32mg12p_msc.h	`154 #define _MSC_READCTRL_MODE_WS1 0x00000001UL /… macro 159 #define MSC_READCTRL_MODE_WS1 (_MSC_READCTRL_MODE_WS1 << 24) /…`
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/
D	efm32gg11b_msc.h	`186 #define _MSC_READCTRL_MODE_WS1 0x00000001UL /… macro 191 #define MSC_READCTRL_MODE_WS1 (_MSC_READCTRL_MODE_WS1 << 24) /…`
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/
D	efm32gg12b_msc.h	`187 #define _MSC_READCTRL_MODE_WS1 0x00000001UL /… macro 192 #define MSC_READCTRL_MODE_WS1 (_MSC_READCTRL_MODE_WS1 << 24) /…`
D	efm32gg12b110f1024iq64.h	`2319 #define _MSC_READCTRL_MODE_WS1 0x00000001UL /… macro 2324 #define MSC_READCTRL_MODE_WS1 (_MSC_READCTRL_MODE_WS1 << 24) /…`
D	efm32gg12b510f1024gl120.h	`2327 #define _MSC_READCTRL_MODE_WS1 0x00000001UL /… macro 2332 #define MSC_READCTRL_MODE_WS1 (_MSC_READCTRL_MODE_WS1 << 24) /…`
D	efm32gg12b510f1024gm64.h	`2327 #define _MSC_READCTRL_MODE_WS1 0x00000001UL /… macro 2332 #define MSC_READCTRL_MODE_WS1 (_MSC_READCTRL_MODE_WS1 << 24) /…`
D	efm32gg12b510f1024gl112.h	`2327 #define _MSC_READCTRL_MODE_WS1 0x00000001UL /… macro 2332 #define MSC_READCTRL_MODE_WS1 (_MSC_READCTRL_MODE_WS1 << 24) /…`
D	efm32gg12b530f512im64.h	`2327 #define _MSC_READCTRL_MODE_WS1 0x00000001UL /… macro 2332 #define MSC_READCTRL_MODE_WS1 (_MSC_READCTRL_MODE_WS1 << 24) /…`
D	efm32gg12b530f512iq64.h	`2327 #define _MSC_READCTRL_MODE_WS1 0x00000001UL /… macro 2332 #define MSC_READCTRL_MODE_WS1 (_MSC_READCTRL_MODE_WS1 << 24) /…`
D	efm32gg12b130f512gm64.h	`2319 #define _MSC_READCTRL_MODE_WS1 0x00000001UL /… macro 2324 #define MSC_READCTRL_MODE_WS1 (_MSC_READCTRL_MODE_WS1 << 24) /…`
D	efm32gg12b130f512gq64.h	`2319 #define _MSC_READCTRL_MODE_WS1 0x00000001UL /… macro 2324 #define MSC_READCTRL_MODE_WS1 (_MSC_READCTRL_MODE_WS1 << 24) /…`
D	efm32gg12b130f512im64.h	`2319 #define _MSC_READCTRL_MODE_WS1 0x00000001UL /… macro 2324 #define MSC_READCTRL_MODE_WS1 (_MSC_READCTRL_MODE_WS1 << 24) /…`
D	efm32gg12b130f512iq64.h	`2319 #define _MSC_READCTRL_MODE_WS1 0x00000001UL /… macro 2324 #define MSC_READCTRL_MODE_WS1 (_MSC_READCTRL_MODE_WS1 << 24) /…`

12 3

TraceRecorderSource-2.7.6
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