1 /***************************************************************************//** 2 * @file 3 * @brief Flash Controller (MSC) Compatibility Header 4 ******************************************************************************* 5 * # License 6 * <b>Copyright 2018 Silicon Laboratories Inc. www.silabs.com</b> 7 ******************************************************************************* 8 * 9 * SPDX-License-Identifier: Zlib 10 * 11 * The licensor of this software is Silicon Laboratories Inc. 12 * 13 * This software is provided 'as-is', without any express or implied 14 * warranty. In no event will the authors be held liable for any damages 15 * arising from the use of this software. 16 * 17 * Permission is granted to anyone to use this software for any purpose, 18 * including commercial applications, and to alter it and redistribute it 19 * freely, subject to the following restrictions: 20 * 21 * 1. The origin of this software must not be misrepresented; you must not 22 * claim that you wrote the original software. If you use this software 23 * in a product, an acknowledgment in the product documentation would be 24 * appreciated but is not required. 25 * 2. Altered source versions must be plainly marked as such, and must not be 26 * misrepresented as being the original software. 27 * 3. This notice may not be removed or altered from any source distribution. 28 * 29 ******************************************************************************/ 30 31 #ifndef EM_MSC_COMPAT_H 32 #define EM_MSC_COMPAT_H 33 34 #if defined(_SILICON_LABS_32B_SERIES_2_CONFIG_2) 35 36 #define MSC_IF_PWROFFIF MSC_IF_PWROFF 37 #define _MSC_IF_PWROFFIF_SHIFT _MSC_IF_PWROFF_SHIFT 38 #define _MSC_IF_PWROFFIF_MASK _MSC_IF_PWROFF_MASK 39 #define _MSC_IF_PWROFFIF_DEFAULT _MSC_IF_PWROFF_DEFAULT 40 #define MSC_IF_PWROFFIF_DEFAULT MSC_IF_PWROFF_DEFAULT 41 42 #define MSC_IEN_PWROFFIEN MSC_IEN_PWROFF 43 #define _MSC_IEN_PWROFFIEN_SHIFT _MSC_IEN_PWROFF_SHIFT 44 #define _MSC_IEN_PWROFFIEN_MASK _MSC_IEN_PWROFF_MASK 45 #define _MSC_IEN_PWROFFIEN_DEFAULT _MSC_IEN_PWROFF_DEFAULT 46 #define MSC_IEN_PWROFFIEN_DEFAULT MSC_IEN_PWROFF_DEFAULT 47 48 49 #define ICACHE_IEN_RAMERRORIEN ICACHE_IEN_RAMERROR 50 #define _ICACHE_IEN_RAMERRORIEN_SHIFT _ICACHE_IEN_RAMERROR_SHIFT 51 #define _ICACHE_IEN_RAMERRORIEN_MASK _ICACHE_IEN_RAMERROR_MASK 52 #define _ICACHE_IEN_RAMERRORIEN_DEFAULT _ICACHE_IEN_RAMERROR_DEFAULT 53 #define ICACHE_IEN_RAMERRORIEN_DEFAULT ICACHE_IEN_RAMERROR_DEFAULT 54 55 56 #define SYSCFG_IF_FRCRAMERR1BIF SYSCFG_IF_FRCRAMERR1B 57 #define _SYSCFG_IF_FRCRAMERR1BIF_SHIFT _SYSCFG_IF_FRCRAMERR1B_SHIFT 58 #define _SYSCFG_IF_FRCRAMERR1BIF_MASK _SYSCFG_IF_FRCRAMERR1B_MASK 59 #define _SYSCFG_IF_FRCRAMERR1BIF_DEFAULT _SYSCFG_IF_FRCRAMERR1B_DEFAULT 60 #define SYSCFG_IF_FRCRAMERR1BIF_DEFAULT SYSCFG_IF_FRCRAMERR1B_DEFAULT 61 62 #define SYSCFG_IF_FRCRAMERR2BIF SYSCFG_IF_FRCRAMERR2B 63 #define _SYSCFG_IF_FRCRAMERR2BIF_SHIFT _SYSCFG_IF_FRCRAMERR2B_SHIFT 64 #define _SYSCFG_IF_FRCRAMERR2BIF_MASK _SYSCFG_IF_FRCRAMERR2B_MASK 65 #define _SYSCFG_IF_FRCRAMERR2BIF_DEFAULT _SYSCFG_IF_FRCRAMERR2B_DEFAULT 66 #define SYSCFG_IF_FRCRAMERR2BIF_DEFAULT SYSCFG_IF_FRCRAMERR2B_DEFAULT 67 68 #define SYSCFG_IEN_FRCRAMERR1BIEN SYSCFG_IEN_FRCRAMERR1B 69 #define _SYSCFG_IEN_FRCRAMERR1BIEN_SHIFT _SYSCFG_IEN_FRCRAMERR1B_SHIFT 70 #define _SYSCFG_IEN_FRCRAMERR1BIEN_MASK _SYSCFG_IEN_FRCRAMERR1B_MASK 71 #define _SYSCFG_IEN_FRCRAMERR1BIEN_DEFAULT _SYSCFG_IEN_FRCRAMERR1B_DEFAULT 72 #define SYSCFG_IEN_FRCRAMERR1BIEN_DEFAULT SYSCFG_IEN_FRCRAMERR1B_DEFAULT 73 74 #define SYSCFG_IEN_FRCRAMERR2BIEN SYSCFG_IEN_FRCRAMERR2B 75 #define _SYSCFG_IEN_FRCRAMERR2BIEN_SHIFT _SYSCFG_IEN_FRCRAMERR2B_SHIFT 76 #define _SYSCFG_IEN_FRCRAMERR2BIEN_MASK _SYSCFG_IEN_FRCRAMERR2B_MASK 77 #define _SYSCFG_IEN_FRCRAMERR2BIEN_DEFAULT _SYSCFG_IEN_FRCRAMERR2B_DEFAULT 78 #define SYSCFG_IEN_FRCRAMERR2BIEN_DEFAULT SYSCFG_IEN_FRCRAMERR2B_DEFAULT 79 80 #endif /* _SILICON_LABS_32B_SERIES_2_CONFIG_2 */ 81 #endif /* EM_MSC_COMPAT_H */ 82
