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Searched refs:_ETM_ETMCIDR2_PREAMB_DEFAULT (Results 1 – 8 of 8) sorted by relevance

/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_etm.h775 #define _ETM_ETMCIDR2_PREAMB_DEFAULT 0x00000005UL /**< Mode… macro
776 #define ETM_ETMCIDR2_PREAMB_DEFAULT (_ETM_ETMCIDR2_PREAMB_DEFAULT << 0) /**< Shif…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_etm.h775 #define _ETM_ETMCIDR2_PREAMB_DEFAULT 0x00000005UL /**< Mode… macro
776 #define ETM_ETMCIDR2_PREAMB_DEFAULT (_ETM_ETMCIDR2_PREAMB_DEFAULT << 0) /**< Shif…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_etm.h775 #define _ETM_ETMCIDR2_PREAMB_DEFAULT 0x00000005UL /**< Mode… macro
776 #define ETM_ETMCIDR2_PREAMB_DEFAULT (_ETM_ETMCIDR2_PREAMB_DEFAULT << 0) /**< Shif…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_etm.h775 #define _ETM_ETMCIDR2_PREAMB_DEFAULT 0x00000005UL /**< Mode… macro
776 #define ETM_ETMCIDR2_PREAMB_DEFAULT (_ETM_ETMCIDR2_PREAMB_DEFAULT << 0) /**< Shif…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32WG/Include/
Defm32wg_etm.h777 #define _ETM_ETMCIDR2_PREAMB_DEFAULT 0x00000005UL /**< Mode… macro
778 #define ETM_ETMCIDR2_PREAMB_DEFAULT (_ETM_ETMCIDR2_PREAMB_DEFAULT << 0) /**< Shif…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_etm.h775 #define _ETM_ETMCIDR2_PREAMB_DEFAULT 0x00000005UL /**< Mode… macro
776 #define ETM_ETMCIDR2_PREAMB_DEFAULT (_ETM_ETMCIDR2_PREAMB_DEFAULT << 0) /**< Shif…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_etm.h775 #define _ETM_ETMCIDR2_PREAMB_DEFAULT 0x00000005UL /**< Mode… macro
776 #define ETM_ETMCIDR2_PREAMB_DEFAULT (_ETM_ETMCIDR2_PREAMB_DEFAULT << 0) /**< Shif…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_etm.h775 #define _ETM_ETMCIDR2_PREAMB_DEFAULT 0x00000005UL /**< Mode… macro
776 #define ETM_ETMCIDR2_PREAMB_DEFAULT (_ETM_ETMCIDR2_PREAMB_DEFAULT << 0) /**< Shif…