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Searched refs:_EMU_R5VADCCTRL_AMUXSEL_VREGIIMON (Results 1 – 25 of 64) sorted by relevance

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/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_emu.h1465 #define _EMU_R5VADCCTRL_AMUXSEL_VREGIIMON 0x00000003UL … macro
1471 #define EMU_R5VADCCTRL_AMUXSEL_VREGIIMON (_EMU_R5VADCCTRL_AMUXSEL_VREGIIMON << …
Defm32gg12b390f1024gl112.h3541 #define _EMU_R5VADCCTRL_AMUXSEL_VREGIIMON 0x00000003UL … macro
3547 #define EMU_R5VADCCTRL_AMUXSEL_VREGIIMON (_EMU_R5VADCCTRL_AMUXSEL_VREGIIMON << …
Defm32gg12b390f512gl112.h3541 #define _EMU_R5VADCCTRL_AMUXSEL_VREGIIMON 0x00000003UL … macro
3547 #define EMU_R5VADCCTRL_AMUXSEL_VREGIIMON (_EMU_R5VADCCTRL_AMUXSEL_VREGIIMON << …
Defm32gg12b110f1024iq64.h4372 #define _EMU_R5VADCCTRL_AMUXSEL_VREGIIMON 0x00000003UL … macro
4378 #define EMU_R5VADCCTRL_AMUXSEL_VREGIIMON (_EMU_R5VADCCTRL_AMUXSEL_VREGIIMON << …
Defm32gg12b510f1024gl120.h4380 #define _EMU_R5VADCCTRL_AMUXSEL_VREGIIMON 0x00000003UL … macro
4386 #define EMU_R5VADCCTRL_AMUXSEL_VREGIIMON (_EMU_R5VADCCTRL_AMUXSEL_VREGIIMON << …
Defm32gg12b510f1024gm64.h4380 #define _EMU_R5VADCCTRL_AMUXSEL_VREGIIMON 0x00000003UL … macro
4386 #define EMU_R5VADCCTRL_AMUXSEL_VREGIIMON (_EMU_R5VADCCTRL_AMUXSEL_VREGIIMON << …
Defm32gg12b510f1024gl112.h4380 #define _EMU_R5VADCCTRL_AMUXSEL_VREGIIMON 0x00000003UL … macro
4386 #define EMU_R5VADCCTRL_AMUXSEL_VREGIIMON (_EMU_R5VADCCTRL_AMUXSEL_VREGIIMON << …
Defm32gg12b530f512im64.h4380 #define _EMU_R5VADCCTRL_AMUXSEL_VREGIIMON 0x00000003UL … macro
4386 #define EMU_R5VADCCTRL_AMUXSEL_VREGIIMON (_EMU_R5VADCCTRL_AMUXSEL_VREGIIMON << …
Defm32gg12b530f512iq64.h4380 #define _EMU_R5VADCCTRL_AMUXSEL_VREGIIMON 0x00000003UL … macro
4386 #define EMU_R5VADCCTRL_AMUXSEL_VREGIIMON (_EMU_R5VADCCTRL_AMUXSEL_VREGIIMON << …
Defm32gg12b130f512gm64.h4372 #define _EMU_R5VADCCTRL_AMUXSEL_VREGIIMON 0x00000003UL … macro
4378 #define EMU_R5VADCCTRL_AMUXSEL_VREGIIMON (_EMU_R5VADCCTRL_AMUXSEL_VREGIIMON << …
Defm32gg12b130f512gq64.h4372 #define _EMU_R5VADCCTRL_AMUXSEL_VREGIIMON 0x00000003UL … macro
4378 #define EMU_R5VADCCTRL_AMUXSEL_VREGIIMON (_EMU_R5VADCCTRL_AMUXSEL_VREGIIMON << …
Defm32gg12b130f512im64.h4372 #define _EMU_R5VADCCTRL_AMUXSEL_VREGIIMON 0x00000003UL … macro
4378 #define EMU_R5VADCCTRL_AMUXSEL_VREGIIMON (_EMU_R5VADCCTRL_AMUXSEL_VREGIIMON << …
Defm32gg12b130f512iq64.h4372 #define _EMU_R5VADCCTRL_AMUXSEL_VREGIIMON 0x00000003UL … macro
4378 #define EMU_R5VADCCTRL_AMUXSEL_VREGIIMON (_EMU_R5VADCCTRL_AMUXSEL_VREGIIMON << …
Defm32gg12b530f512iq100.h4380 #define _EMU_R5VADCCTRL_AMUXSEL_VREGIIMON 0x00000003UL … macro
4386 #define EMU_R5VADCCTRL_AMUXSEL_VREGIIMON (_EMU_R5VADCCTRL_AMUXSEL_VREGIIMON << …
Defm32gg12b110f1024gm64.h4372 #define _EMU_R5VADCCTRL_AMUXSEL_VREGIIMON 0x00000003UL … macro
4378 #define EMU_R5VADCCTRL_AMUXSEL_VREGIIMON (_EMU_R5VADCCTRL_AMUXSEL_VREGIIMON << …
Defm32gg12b110f1024gq64.h4372 #define _EMU_R5VADCCTRL_AMUXSEL_VREGIIMON 0x00000003UL … macro
4378 #define EMU_R5VADCCTRL_AMUXSEL_VREGIIMON (_EMU_R5VADCCTRL_AMUXSEL_VREGIIMON << …
Defm32gg12b510f1024iq100.h4380 #define _EMU_R5VADCCTRL_AMUXSEL_VREGIIMON 0x00000003UL … macro
4386 #define EMU_R5VADCCTRL_AMUXSEL_VREGIIMON (_EMU_R5VADCCTRL_AMUXSEL_VREGIIMON << …
Defm32gg12b510f1024gq64.h4380 #define _EMU_R5VADCCTRL_AMUXSEL_VREGIIMON 0x00000003UL … macro
4386 #define EMU_R5VADCCTRL_AMUXSEL_VREGIIMON (_EMU_R5VADCCTRL_AMUXSEL_VREGIIMON << …
Defm32gg12b510f1024il112.h4380 #define _EMU_R5VADCCTRL_AMUXSEL_VREGIIMON 0x00000003UL … macro
4386 #define EMU_R5VADCCTRL_AMUXSEL_VREGIIMON (_EMU_R5VADCCTRL_AMUXSEL_VREGIIMON << …
Defm32gg12b510f1024im64.h4380 #define _EMU_R5VADCCTRL_AMUXSEL_VREGIIMON 0x00000003UL … macro
4386 #define EMU_R5VADCCTRL_AMUXSEL_VREGIIMON (_EMU_R5VADCCTRL_AMUXSEL_VREGIIMON << …
Defm32gg12b510f1024il120.h4380 #define _EMU_R5VADCCTRL_AMUXSEL_VREGIIMON 0x00000003UL … macro
4386 #define EMU_R5VADCCTRL_AMUXSEL_VREGIIMON (_EMU_R5VADCCTRL_AMUXSEL_VREGIIMON << …
Defm32gg12b510f1024gq100.h4380 #define _EMU_R5VADCCTRL_AMUXSEL_VREGIIMON 0x00000003UL … macro
4386 #define EMU_R5VADCCTRL_AMUXSEL_VREGIIMON (_EMU_R5VADCCTRL_AMUXSEL_VREGIIMON << …
Defm32gg12b530f512gm64.h4380 #define _EMU_R5VADCCTRL_AMUXSEL_VREGIIMON 0x00000003UL … macro
4386 #define EMU_R5VADCCTRL_AMUXSEL_VREGIIMON (_EMU_R5VADCCTRL_AMUXSEL_VREGIIMON << …
Defm32gg12b530f512gl120.h4380 #define _EMU_R5VADCCTRL_AMUXSEL_VREGIIMON 0x00000003UL … macro
4386 #define EMU_R5VADCCTRL_AMUXSEL_VREGIIMON (_EMU_R5VADCCTRL_AMUXSEL_VREGIIMON << …
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_emu.h1481 #define _EMU_R5VADCCTRL_AMUXSEL_VREGIIMON 0x00000003UL … macro
1487 #define EMU_R5VADCCTRL_AMUXSEL_VREGIIMON (_EMU_R5VADCCTRL_AMUXSEL_VREGIIMON << …

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