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Searched refs:_EMU_PWRCTRL_REGPWRSEL_DEFAULT (Results 1 – 25 of 69) sorted by relevance

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/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_emu.h796 #define _EMU_PWRCTRL_REGPWRSEL_DEFAULT 0x00000000UL … macro
799 #define EMU_PWRCTRL_REGPWRSEL_DEFAULT (_EMU_PWRCTRL_REGPWRSEL_DEFAULT << 10)…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_emu.h796 #define _EMU_PWRCTRL_REGPWRSEL_DEFAULT 0x00000000UL … macro
799 #define EMU_PWRCTRL_REGPWRSEL_DEFAULT (_EMU_PWRCTRL_REGPWRSEL_DEFAULT << 10)…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_emu.h779 #define _EMU_PWRCTRL_REGPWRSEL_DEFAULT 0x00000000UL … macro
782 #define EMU_PWRCTRL_REGPWRSEL_DEFAULT (_EMU_PWRCTRL_REGPWRSEL_DEFAULT << 10)…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_emu.h796 #define _EMU_PWRCTRL_REGPWRSEL_DEFAULT 0x00000000UL … macro
799 #define EMU_PWRCTRL_REGPWRSEL_DEFAULT (_EMU_PWRCTRL_REGPWRSEL_DEFAULT << 10)…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_emu.h779 #define _EMU_PWRCTRL_REGPWRSEL_DEFAULT 0x00000000UL … macro
782 #define EMU_PWRCTRL_REGPWRSEL_DEFAULT (_EMU_PWRCTRL_REGPWRSEL_DEFAULT << 10)…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_emu.h907 #define _EMU_PWRCTRL_REGPWRSEL_DEFAULT 0x00000000UL … macro
910 #define EMU_PWRCTRL_REGPWRSEL_DEFAULT (_EMU_PWRCTRL_REGPWRSEL_DEFAULT << 10)…
Defm32gg12b390f1024gl112.h2983 #define _EMU_PWRCTRL_REGPWRSEL_DEFAULT 0x00000000UL … macro
2986 #define EMU_PWRCTRL_REGPWRSEL_DEFAULT (_EMU_PWRCTRL_REGPWRSEL_DEFAULT << 10)…
Defm32gg12b390f512gl112.h2983 #define _EMU_PWRCTRL_REGPWRSEL_DEFAULT 0x00000000UL … macro
2986 #define EMU_PWRCTRL_REGPWRSEL_DEFAULT (_EMU_PWRCTRL_REGPWRSEL_DEFAULT << 10)…
Defm32gg12b110f1024iq64.h3814 #define _EMU_PWRCTRL_REGPWRSEL_DEFAULT 0x00000000UL … macro
3817 #define EMU_PWRCTRL_REGPWRSEL_DEFAULT (_EMU_PWRCTRL_REGPWRSEL_DEFAULT << 10)…
Defm32gg12b510f1024gl120.h3822 #define _EMU_PWRCTRL_REGPWRSEL_DEFAULT 0x00000000UL … macro
3825 #define EMU_PWRCTRL_REGPWRSEL_DEFAULT (_EMU_PWRCTRL_REGPWRSEL_DEFAULT << 10)…
Defm32gg12b510f1024gm64.h3822 #define _EMU_PWRCTRL_REGPWRSEL_DEFAULT 0x00000000UL … macro
3825 #define EMU_PWRCTRL_REGPWRSEL_DEFAULT (_EMU_PWRCTRL_REGPWRSEL_DEFAULT << 10)…
Defm32gg12b510f1024gl112.h3822 #define _EMU_PWRCTRL_REGPWRSEL_DEFAULT 0x00000000UL … macro
3825 #define EMU_PWRCTRL_REGPWRSEL_DEFAULT (_EMU_PWRCTRL_REGPWRSEL_DEFAULT << 10)…
Defm32gg12b530f512im64.h3822 #define _EMU_PWRCTRL_REGPWRSEL_DEFAULT 0x00000000UL … macro
3825 #define EMU_PWRCTRL_REGPWRSEL_DEFAULT (_EMU_PWRCTRL_REGPWRSEL_DEFAULT << 10)…
Defm32gg12b530f512iq64.h3822 #define _EMU_PWRCTRL_REGPWRSEL_DEFAULT 0x00000000UL … macro
3825 #define EMU_PWRCTRL_REGPWRSEL_DEFAULT (_EMU_PWRCTRL_REGPWRSEL_DEFAULT << 10)…
Defm32gg12b130f512gm64.h3814 #define _EMU_PWRCTRL_REGPWRSEL_DEFAULT 0x00000000UL … macro
3817 #define EMU_PWRCTRL_REGPWRSEL_DEFAULT (_EMU_PWRCTRL_REGPWRSEL_DEFAULT << 10)…
Defm32gg12b130f512gq64.h3814 #define _EMU_PWRCTRL_REGPWRSEL_DEFAULT 0x00000000UL … macro
3817 #define EMU_PWRCTRL_REGPWRSEL_DEFAULT (_EMU_PWRCTRL_REGPWRSEL_DEFAULT << 10)…
Defm32gg12b130f512im64.h3814 #define _EMU_PWRCTRL_REGPWRSEL_DEFAULT 0x00000000UL … macro
3817 #define EMU_PWRCTRL_REGPWRSEL_DEFAULT (_EMU_PWRCTRL_REGPWRSEL_DEFAULT << 10)…
Defm32gg12b130f512iq64.h3814 #define _EMU_PWRCTRL_REGPWRSEL_DEFAULT 0x00000000UL … macro
3817 #define EMU_PWRCTRL_REGPWRSEL_DEFAULT (_EMU_PWRCTRL_REGPWRSEL_DEFAULT << 10)…
Defm32gg12b530f512iq100.h3822 #define _EMU_PWRCTRL_REGPWRSEL_DEFAULT 0x00000000UL … macro
3825 #define EMU_PWRCTRL_REGPWRSEL_DEFAULT (_EMU_PWRCTRL_REGPWRSEL_DEFAULT << 10)…
Defm32gg12b110f1024gm64.h3814 #define _EMU_PWRCTRL_REGPWRSEL_DEFAULT 0x00000000UL … macro
3817 #define EMU_PWRCTRL_REGPWRSEL_DEFAULT (_EMU_PWRCTRL_REGPWRSEL_DEFAULT << 10)…
Defm32gg12b110f1024gq64.h3814 #define _EMU_PWRCTRL_REGPWRSEL_DEFAULT 0x00000000UL … macro
3817 #define EMU_PWRCTRL_REGPWRSEL_DEFAULT (_EMU_PWRCTRL_REGPWRSEL_DEFAULT << 10)…
Defm32gg12b510f1024iq100.h3822 #define _EMU_PWRCTRL_REGPWRSEL_DEFAULT 0x00000000UL … macro
3825 #define EMU_PWRCTRL_REGPWRSEL_DEFAULT (_EMU_PWRCTRL_REGPWRSEL_DEFAULT << 10)…
Defm32gg12b510f1024gq64.h3822 #define _EMU_PWRCTRL_REGPWRSEL_DEFAULT 0x00000000UL … macro
3825 #define EMU_PWRCTRL_REGPWRSEL_DEFAULT (_EMU_PWRCTRL_REGPWRSEL_DEFAULT << 10)…
Defm32gg12b510f1024il112.h3822 #define _EMU_PWRCTRL_REGPWRSEL_DEFAULT 0x00000000UL … macro
3825 #define EMU_PWRCTRL_REGPWRSEL_DEFAULT (_EMU_PWRCTRL_REGPWRSEL_DEFAULT << 10)…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_emu.h915 #define _EMU_PWRCTRL_REGPWRSEL_DEFAULT 0x00000000UL … macro
918 #define EMU_PWRCTRL_REGPWRSEL_DEFAULT (_EMU_PWRCTRL_REGPWRSEL_DEFAULT << 10)…

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