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Searched refs:_EMU_IFC_VMONALTAVDDFALL_DEFAULT (Results 1 – 25 of 71) sorted by relevance

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/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32FG1P/Include/
Defr32fg1p_emu.h482 #define _EMU_IFC_VMONALTAVDDFALL_DEFAULT 0x00000000UL … macro
483 #define EMU_IFC_VMONALTAVDDFALL_DEFAULT (_EMU_IFC_VMONALTAVDDFALL_DEFAULT << 2) …
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32PG1B/Include/
Defm32pg1b_emu.h482 #define _EMU_IFC_VMONALTAVDDFALL_DEFAULT 0x00000000UL … macro
483 #define EMU_IFC_VMONALTAVDDFALL_DEFAULT (_EMU_IFC_VMONALTAVDDFALL_DEFAULT << 2) …
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_emu.h561 #define _EMU_IFC_VMONALTAVDDFALL_DEFAULT 0x00000000UL … macro
562 #define EMU_IFC_VMONALTAVDDFALL_DEFAULT (_EMU_IFC_VMONALTAVDDFALL_DEFAULT << 2…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_emu.h561 #define _EMU_IFC_VMONALTAVDDFALL_DEFAULT 0x00000000UL … macro
562 #define EMU_IFC_VMONALTAVDDFALL_DEFAULT (_EMU_IFC_VMONALTAVDDFALL_DEFAULT << 2…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_emu.h556 #define _EMU_IFC_VMONALTAVDDFALL_DEFAULT 0x00000000UL … macro
557 #define EMU_IFC_VMONALTAVDDFALL_DEFAULT (_EMU_IFC_VMONALTAVDDFALL_DEFAULT << 2…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_emu.h561 #define _EMU_IFC_VMONALTAVDDFALL_DEFAULT 0x00000000UL … macro
562 #define EMU_IFC_VMONALTAVDDFALL_DEFAULT (_EMU_IFC_VMONALTAVDDFALL_DEFAULT << 2…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_emu.h556 #define _EMU_IFC_VMONALTAVDDFALL_DEFAULT 0x00000000UL … macro
557 #define EMU_IFC_VMONALTAVDDFALL_DEFAULT (_EMU_IFC_VMONALTAVDDFALL_DEFAULT << 2…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_emu.h634 #define _EMU_IFC_VMONALTAVDDFALL_DEFAULT 0x00000000UL … macro
635 #define EMU_IFC_VMONALTAVDDFALL_DEFAULT (_EMU_IFC_VMONALTAVDDFALL_DEFAULT << 2…
Defm32gg12b390f1024gl112.h2710 #define _EMU_IFC_VMONALTAVDDFALL_DEFAULT 0x00000000UL … macro
2711 #define EMU_IFC_VMONALTAVDDFALL_DEFAULT (_EMU_IFC_VMONALTAVDDFALL_DEFAULT << 2…
Defm32gg12b390f512gl112.h2710 #define _EMU_IFC_VMONALTAVDDFALL_DEFAULT 0x00000000UL … macro
2711 #define EMU_IFC_VMONALTAVDDFALL_DEFAULT (_EMU_IFC_VMONALTAVDDFALL_DEFAULT << 2…
Defm32gg12b110f1024iq64.h3541 #define _EMU_IFC_VMONALTAVDDFALL_DEFAULT 0x00000000UL … macro
3542 #define EMU_IFC_VMONALTAVDDFALL_DEFAULT (_EMU_IFC_VMONALTAVDDFALL_DEFAULT << 2…
Defm32gg12b510f1024gl120.h3549 #define _EMU_IFC_VMONALTAVDDFALL_DEFAULT 0x00000000UL … macro
3550 #define EMU_IFC_VMONALTAVDDFALL_DEFAULT (_EMU_IFC_VMONALTAVDDFALL_DEFAULT << 2…
Defm32gg12b510f1024gm64.h3549 #define _EMU_IFC_VMONALTAVDDFALL_DEFAULT 0x00000000UL … macro
3550 #define EMU_IFC_VMONALTAVDDFALL_DEFAULT (_EMU_IFC_VMONALTAVDDFALL_DEFAULT << 2…
Defm32gg12b510f1024gl112.h3549 #define _EMU_IFC_VMONALTAVDDFALL_DEFAULT 0x00000000UL … macro
3550 #define EMU_IFC_VMONALTAVDDFALL_DEFAULT (_EMU_IFC_VMONALTAVDDFALL_DEFAULT << 2…
Defm32gg12b530f512im64.h3549 #define _EMU_IFC_VMONALTAVDDFALL_DEFAULT 0x00000000UL … macro
3550 #define EMU_IFC_VMONALTAVDDFALL_DEFAULT (_EMU_IFC_VMONALTAVDDFALL_DEFAULT << 2…
Defm32gg12b530f512iq64.h3549 #define _EMU_IFC_VMONALTAVDDFALL_DEFAULT 0x00000000UL … macro
3550 #define EMU_IFC_VMONALTAVDDFALL_DEFAULT (_EMU_IFC_VMONALTAVDDFALL_DEFAULT << 2…
Defm32gg12b130f512gm64.h3541 #define _EMU_IFC_VMONALTAVDDFALL_DEFAULT 0x00000000UL … macro
3542 #define EMU_IFC_VMONALTAVDDFALL_DEFAULT (_EMU_IFC_VMONALTAVDDFALL_DEFAULT << 2…
Defm32gg12b130f512gq64.h3541 #define _EMU_IFC_VMONALTAVDDFALL_DEFAULT 0x00000000UL … macro
3542 #define EMU_IFC_VMONALTAVDDFALL_DEFAULT (_EMU_IFC_VMONALTAVDDFALL_DEFAULT << 2…
Defm32gg12b130f512im64.h3541 #define _EMU_IFC_VMONALTAVDDFALL_DEFAULT 0x00000000UL … macro
3542 #define EMU_IFC_VMONALTAVDDFALL_DEFAULT (_EMU_IFC_VMONALTAVDDFALL_DEFAULT << 2…
Defm32gg12b130f512iq64.h3541 #define _EMU_IFC_VMONALTAVDDFALL_DEFAULT 0x00000000UL … macro
3542 #define EMU_IFC_VMONALTAVDDFALL_DEFAULT (_EMU_IFC_VMONALTAVDDFALL_DEFAULT << 2…
Defm32gg12b530f512iq100.h3549 #define _EMU_IFC_VMONALTAVDDFALL_DEFAULT 0x00000000UL … macro
3550 #define EMU_IFC_VMONALTAVDDFALL_DEFAULT (_EMU_IFC_VMONALTAVDDFALL_DEFAULT << 2…
Defm32gg12b110f1024gm64.h3541 #define _EMU_IFC_VMONALTAVDDFALL_DEFAULT 0x00000000UL … macro
3542 #define EMU_IFC_VMONALTAVDDFALL_DEFAULT (_EMU_IFC_VMONALTAVDDFALL_DEFAULT << 2…
Defm32gg12b110f1024gq64.h3541 #define _EMU_IFC_VMONALTAVDDFALL_DEFAULT 0x00000000UL … macro
3542 #define EMU_IFC_VMONALTAVDDFALL_DEFAULT (_EMU_IFC_VMONALTAVDDFALL_DEFAULT << 2…
Defm32gg12b510f1024iq100.h3549 #define _EMU_IFC_VMONALTAVDDFALL_DEFAULT 0x00000000UL … macro
3550 #define EMU_IFC_VMONALTAVDDFALL_DEFAULT (_EMU_IFC_VMONALTAVDDFALL_DEFAULT << 2…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_emu.h642 #define _EMU_IFC_VMONALTAVDDFALL_DEFAULT 0x00000000UL … macro
643 #define EMU_IFC_VMONALTAVDDFALL_DEFAULT (_EMU_IFC_VMONALTAVDDFALL_DEFAULT << 2…

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