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Searched refs:_EMU_DCDCMISCCTRL_PFETCNT_DEFAULT (Results 1 – 25 of 71) sorted by relevance

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/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32FG1P/Include/
Defr32fg1p_emu.h749 #define _EMU_DCDCMISCCTRL_PFETCNT_DEFAULT 0x00000007UL … macro
750 #define EMU_DCDCMISCCTRL_PFETCNT_DEFAULT (_EMU_DCDCMISCCTRL_PFETCNT_DEFAULT << 8) …
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32PG1B/Include/
Defm32pg1b_emu.h749 #define _EMU_DCDCMISCCTRL_PFETCNT_DEFAULT 0x00000007UL … macro
750 #define EMU_DCDCMISCCTRL_PFETCNT_DEFAULT (_EMU_DCDCMISCCTRL_PFETCNT_DEFAULT << 8) …
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_emu.h867 #define _EMU_DCDCMISCCTRL_PFETCNT_DEFAULT 0x00000007UL … macro
868 #define EMU_DCDCMISCCTRL_PFETCNT_DEFAULT (_EMU_DCDCMISCCTRL_PFETCNT_DEFAULT << …
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_emu.h867 #define _EMU_DCDCMISCCTRL_PFETCNT_DEFAULT 0x00000007UL … macro
868 #define EMU_DCDCMISCCTRL_PFETCNT_DEFAULT (_EMU_DCDCMISCCTRL_PFETCNT_DEFAULT << …
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_emu.h850 #define _EMU_DCDCMISCCTRL_PFETCNT_DEFAULT 0x00000007UL … macro
851 #define EMU_DCDCMISCCTRL_PFETCNT_DEFAULT (_EMU_DCDCMISCCTRL_PFETCNT_DEFAULT << …
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_emu.h867 #define _EMU_DCDCMISCCTRL_PFETCNT_DEFAULT 0x00000007UL … macro
868 #define EMU_DCDCMISCCTRL_PFETCNT_DEFAULT (_EMU_DCDCMISCCTRL_PFETCNT_DEFAULT << …
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_emu.h850 #define _EMU_DCDCMISCCTRL_PFETCNT_DEFAULT 0x00000007UL … macro
851 #define EMU_DCDCMISCCTRL_PFETCNT_DEFAULT (_EMU_DCDCMISCCTRL_PFETCNT_DEFAULT << …
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_emu.h978 #define _EMU_DCDCMISCCTRL_PFETCNT_DEFAULT 0x00000007UL … macro
979 #define EMU_DCDCMISCCTRL_PFETCNT_DEFAULT (_EMU_DCDCMISCCTRL_PFETCNT_DEFAULT << …
Defm32gg12b390f1024gl112.h3054 #define _EMU_DCDCMISCCTRL_PFETCNT_DEFAULT 0x00000007UL … macro
3055 #define EMU_DCDCMISCCTRL_PFETCNT_DEFAULT (_EMU_DCDCMISCCTRL_PFETCNT_DEFAULT << …
Defm32gg12b390f512gl112.h3054 #define _EMU_DCDCMISCCTRL_PFETCNT_DEFAULT 0x00000007UL … macro
3055 #define EMU_DCDCMISCCTRL_PFETCNT_DEFAULT (_EMU_DCDCMISCCTRL_PFETCNT_DEFAULT << …
Defm32gg12b110f1024iq64.h3885 #define _EMU_DCDCMISCCTRL_PFETCNT_DEFAULT 0x00000007UL … macro
3886 #define EMU_DCDCMISCCTRL_PFETCNT_DEFAULT (_EMU_DCDCMISCCTRL_PFETCNT_DEFAULT << …
Defm32gg12b510f1024gl120.h3893 #define _EMU_DCDCMISCCTRL_PFETCNT_DEFAULT 0x00000007UL … macro
3894 #define EMU_DCDCMISCCTRL_PFETCNT_DEFAULT (_EMU_DCDCMISCCTRL_PFETCNT_DEFAULT << …
Defm32gg12b510f1024gm64.h3893 #define _EMU_DCDCMISCCTRL_PFETCNT_DEFAULT 0x00000007UL … macro
3894 #define EMU_DCDCMISCCTRL_PFETCNT_DEFAULT (_EMU_DCDCMISCCTRL_PFETCNT_DEFAULT << …
Defm32gg12b510f1024gl112.h3893 #define _EMU_DCDCMISCCTRL_PFETCNT_DEFAULT 0x00000007UL … macro
3894 #define EMU_DCDCMISCCTRL_PFETCNT_DEFAULT (_EMU_DCDCMISCCTRL_PFETCNT_DEFAULT << …
Defm32gg12b530f512im64.h3893 #define _EMU_DCDCMISCCTRL_PFETCNT_DEFAULT 0x00000007UL … macro
3894 #define EMU_DCDCMISCCTRL_PFETCNT_DEFAULT (_EMU_DCDCMISCCTRL_PFETCNT_DEFAULT << …
Defm32gg12b530f512iq64.h3893 #define _EMU_DCDCMISCCTRL_PFETCNT_DEFAULT 0x00000007UL … macro
3894 #define EMU_DCDCMISCCTRL_PFETCNT_DEFAULT (_EMU_DCDCMISCCTRL_PFETCNT_DEFAULT << …
Defm32gg12b130f512gm64.h3885 #define _EMU_DCDCMISCCTRL_PFETCNT_DEFAULT 0x00000007UL … macro
3886 #define EMU_DCDCMISCCTRL_PFETCNT_DEFAULT (_EMU_DCDCMISCCTRL_PFETCNT_DEFAULT << …
Defm32gg12b130f512gq64.h3885 #define _EMU_DCDCMISCCTRL_PFETCNT_DEFAULT 0x00000007UL … macro
3886 #define EMU_DCDCMISCCTRL_PFETCNT_DEFAULT (_EMU_DCDCMISCCTRL_PFETCNT_DEFAULT << …
Defm32gg12b130f512im64.h3885 #define _EMU_DCDCMISCCTRL_PFETCNT_DEFAULT 0x00000007UL … macro
3886 #define EMU_DCDCMISCCTRL_PFETCNT_DEFAULT (_EMU_DCDCMISCCTRL_PFETCNT_DEFAULT << …
Defm32gg12b130f512iq64.h3885 #define _EMU_DCDCMISCCTRL_PFETCNT_DEFAULT 0x00000007UL … macro
3886 #define EMU_DCDCMISCCTRL_PFETCNT_DEFAULT (_EMU_DCDCMISCCTRL_PFETCNT_DEFAULT << …
Defm32gg12b530f512iq100.h3893 #define _EMU_DCDCMISCCTRL_PFETCNT_DEFAULT 0x00000007UL … macro
3894 #define EMU_DCDCMISCCTRL_PFETCNT_DEFAULT (_EMU_DCDCMISCCTRL_PFETCNT_DEFAULT << …
Defm32gg12b110f1024gm64.h3885 #define _EMU_DCDCMISCCTRL_PFETCNT_DEFAULT 0x00000007UL … macro
3886 #define EMU_DCDCMISCCTRL_PFETCNT_DEFAULT (_EMU_DCDCMISCCTRL_PFETCNT_DEFAULT << …
Defm32gg12b110f1024gq64.h3885 #define _EMU_DCDCMISCCTRL_PFETCNT_DEFAULT 0x00000007UL … macro
3886 #define EMU_DCDCMISCCTRL_PFETCNT_DEFAULT (_EMU_DCDCMISCCTRL_PFETCNT_DEFAULT << …
Defm32gg12b510f1024iq100.h3893 #define _EMU_DCDCMISCCTRL_PFETCNT_DEFAULT 0x00000007UL … macro
3894 #define EMU_DCDCMISCCTRL_PFETCNT_DEFAULT (_EMU_DCDCMISCCTRL_PFETCNT_DEFAULT << …
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_emu.h986 #define _EMU_DCDCMISCCTRL_PFETCNT_DEFAULT 0x00000007UL … macro
987 #define EMU_DCDCMISCCTRL_PFETCNT_DEFAULT (_EMU_DCDCMISCCTRL_PFETCNT_DEFAULT << …

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