Home
last modified time | relevance | path

Searched refs:_EMU_DCDCLPCTRL_LPBLANK_DEFAULT (Results 1 – 25 of 71) sorted by relevance

123

/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32FG1P/Include/
Defr32fg1p_emu.h906 #define _EMU_DCDCLPCTRL_LPBLANK_DEFAULT 0x00000000UL /… macro
907 #define EMU_DCDCLPCTRL_LPBLANK_DEFAULT (_EMU_DCDCLPCTRL_LPBLANK_DEFAULT << 25) /…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32PG1B/Include/
Defm32pg1b_emu.h906 #define _EMU_DCDCLPCTRL_LPBLANK_DEFAULT 0x00000000UL /… macro
907 #define EMU_DCDCLPCTRL_LPBLANK_DEFAULT (_EMU_DCDCLPCTRL_LPBLANK_DEFAULT << 25) /…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_emu.h999 #define _EMU_DCDCLPCTRL_LPBLANK_DEFAULT 0x00000001UL … macro
1000 #define EMU_DCDCLPCTRL_LPBLANK_DEFAULT (_EMU_DCDCLPCTRL_LPBLANK_DEFAULT << 25…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_emu.h999 #define _EMU_DCDCLPCTRL_LPBLANK_DEFAULT 0x00000001UL … macro
1000 #define EMU_DCDCLPCTRL_LPBLANK_DEFAULT (_EMU_DCDCLPCTRL_LPBLANK_DEFAULT << 25…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_emu.h982 #define _EMU_DCDCLPCTRL_LPBLANK_DEFAULT 0x00000001UL … macro
983 #define EMU_DCDCLPCTRL_LPBLANK_DEFAULT (_EMU_DCDCLPCTRL_LPBLANK_DEFAULT << 25…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_emu.h999 #define _EMU_DCDCLPCTRL_LPBLANK_DEFAULT 0x00000001UL … macro
1000 #define EMU_DCDCLPCTRL_LPBLANK_DEFAULT (_EMU_DCDCLPCTRL_LPBLANK_DEFAULT << 25…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_emu.h982 #define _EMU_DCDCLPCTRL_LPBLANK_DEFAULT 0x00000001UL … macro
983 #define EMU_DCDCLPCTRL_LPBLANK_DEFAULT (_EMU_DCDCLPCTRL_LPBLANK_DEFAULT << 25…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_emu.h1110 #define _EMU_DCDCLPCTRL_LPBLANK_DEFAULT 0x00000001UL … macro
1111 #define EMU_DCDCLPCTRL_LPBLANK_DEFAULT (_EMU_DCDCLPCTRL_LPBLANK_DEFAULT << 25…
Defm32gg12b390f1024gl112.h3186 #define _EMU_DCDCLPCTRL_LPBLANK_DEFAULT 0x00000001UL … macro
3187 #define EMU_DCDCLPCTRL_LPBLANK_DEFAULT (_EMU_DCDCLPCTRL_LPBLANK_DEFAULT << 25…
Defm32gg12b390f512gl112.h3186 #define _EMU_DCDCLPCTRL_LPBLANK_DEFAULT 0x00000001UL … macro
3187 #define EMU_DCDCLPCTRL_LPBLANK_DEFAULT (_EMU_DCDCLPCTRL_LPBLANK_DEFAULT << 25…
Defm32gg12b110f1024iq64.h4017 #define _EMU_DCDCLPCTRL_LPBLANK_DEFAULT 0x00000001UL … macro
4018 #define EMU_DCDCLPCTRL_LPBLANK_DEFAULT (_EMU_DCDCLPCTRL_LPBLANK_DEFAULT << 25…
Defm32gg12b510f1024gl120.h4025 #define _EMU_DCDCLPCTRL_LPBLANK_DEFAULT 0x00000001UL … macro
4026 #define EMU_DCDCLPCTRL_LPBLANK_DEFAULT (_EMU_DCDCLPCTRL_LPBLANK_DEFAULT << 25…
Defm32gg12b510f1024gm64.h4025 #define _EMU_DCDCLPCTRL_LPBLANK_DEFAULT 0x00000001UL … macro
4026 #define EMU_DCDCLPCTRL_LPBLANK_DEFAULT (_EMU_DCDCLPCTRL_LPBLANK_DEFAULT << 25…
Defm32gg12b510f1024gl112.h4025 #define _EMU_DCDCLPCTRL_LPBLANK_DEFAULT 0x00000001UL … macro
4026 #define EMU_DCDCLPCTRL_LPBLANK_DEFAULT (_EMU_DCDCLPCTRL_LPBLANK_DEFAULT << 25…
Defm32gg12b530f512im64.h4025 #define _EMU_DCDCLPCTRL_LPBLANK_DEFAULT 0x00000001UL … macro
4026 #define EMU_DCDCLPCTRL_LPBLANK_DEFAULT (_EMU_DCDCLPCTRL_LPBLANK_DEFAULT << 25…
Defm32gg12b530f512iq64.h4025 #define _EMU_DCDCLPCTRL_LPBLANK_DEFAULT 0x00000001UL … macro
4026 #define EMU_DCDCLPCTRL_LPBLANK_DEFAULT (_EMU_DCDCLPCTRL_LPBLANK_DEFAULT << 25…
Defm32gg12b130f512gm64.h4017 #define _EMU_DCDCLPCTRL_LPBLANK_DEFAULT 0x00000001UL … macro
4018 #define EMU_DCDCLPCTRL_LPBLANK_DEFAULT (_EMU_DCDCLPCTRL_LPBLANK_DEFAULT << 25…
Defm32gg12b130f512gq64.h4017 #define _EMU_DCDCLPCTRL_LPBLANK_DEFAULT 0x00000001UL … macro
4018 #define EMU_DCDCLPCTRL_LPBLANK_DEFAULT (_EMU_DCDCLPCTRL_LPBLANK_DEFAULT << 25…
Defm32gg12b130f512im64.h4017 #define _EMU_DCDCLPCTRL_LPBLANK_DEFAULT 0x00000001UL … macro
4018 #define EMU_DCDCLPCTRL_LPBLANK_DEFAULT (_EMU_DCDCLPCTRL_LPBLANK_DEFAULT << 25…
Defm32gg12b130f512iq64.h4017 #define _EMU_DCDCLPCTRL_LPBLANK_DEFAULT 0x00000001UL … macro
4018 #define EMU_DCDCLPCTRL_LPBLANK_DEFAULT (_EMU_DCDCLPCTRL_LPBLANK_DEFAULT << 25…
Defm32gg12b530f512iq100.h4025 #define _EMU_DCDCLPCTRL_LPBLANK_DEFAULT 0x00000001UL … macro
4026 #define EMU_DCDCLPCTRL_LPBLANK_DEFAULT (_EMU_DCDCLPCTRL_LPBLANK_DEFAULT << 25…
Defm32gg12b110f1024gm64.h4017 #define _EMU_DCDCLPCTRL_LPBLANK_DEFAULT 0x00000001UL … macro
4018 #define EMU_DCDCLPCTRL_LPBLANK_DEFAULT (_EMU_DCDCLPCTRL_LPBLANK_DEFAULT << 25…
Defm32gg12b110f1024gq64.h4017 #define _EMU_DCDCLPCTRL_LPBLANK_DEFAULT 0x00000001UL … macro
4018 #define EMU_DCDCLPCTRL_LPBLANK_DEFAULT (_EMU_DCDCLPCTRL_LPBLANK_DEFAULT << 25…
Defm32gg12b510f1024iq100.h4025 #define _EMU_DCDCLPCTRL_LPBLANK_DEFAULT 0x00000001UL … macro
4026 #define EMU_DCDCLPCTRL_LPBLANK_DEFAULT (_EMU_DCDCLPCTRL_LPBLANK_DEFAULT << 25…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_emu.h1118 #define _EMU_DCDCLPCTRL_LPBLANK_DEFAULT 0x00000001UL … macro
1119 #define EMU_DCDCLPCTRL_LPBLANK_DEFAULT (_EMU_DCDCLPCTRL_LPBLANK_DEFAULT << 25…

123