_DMA_RDS_RDSCH1_DEFAULT (reference) in projects: hal_silabs-3.5.0

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Searched refs:_DMA_RDS_RDSCH1_DEFAULT (Results 1 – 25 of 28) sorted by relevance

/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32WG/Include/
D	efm32wg_dma.h	`1373 #define _DMA_RDS_RDSCH1_DEFAULT 0x00000000UL /< Mode … macro 1374 #define DMA_RDS_RDSCH1_DEFAULT (_DMA_RDS_RDSCH1_DEFAULT << 1) /< Shift…`
D	efm32wg360f128.h	`1810 #define _DMA_RDS_RDSCH1_DEFAULT 0x00000000UL /< Mode … macro 1811 #define DMA_RDS_RDSCH1_DEFAULT (_DMA_RDS_RDSCH1_DEFAULT << 1) /< Shift…`
D	efm32wg360f256.h	`1810 #define _DMA_RDS_RDSCH1_DEFAULT 0x00000000UL /< Mode … macro 1811 #define DMA_RDS_RDSCH1_DEFAULT (_DMA_RDS_RDSCH1_DEFAULT << 1) /< Shift…`
D	efm32wg360f64.h	`1810 #define _DMA_RDS_RDSCH1_DEFAULT 0x00000000UL /< Mode … macro 1811 #define DMA_RDS_RDSCH1_DEFAULT (_DMA_RDS_RDSCH1_DEFAULT << 1) /< Shift…`
D	efm32wg842f128.h	`1890 #define _DMA_RDS_RDSCH1_DEFAULT 0x00000000UL /< Mode … macro 1891 #define DMA_RDS_RDSCH1_DEFAULT (_DMA_RDS_RDSCH1_DEFAULT << 1) /< Shift…`
D	efm32wg840f256.h	`1890 #define _DMA_RDS_RDSCH1_DEFAULT 0x00000000UL /< Mode … macro 1891 #define DMA_RDS_RDSCH1_DEFAULT (_DMA_RDS_RDSCH1_DEFAULT << 1) /< Shift…`
D	efm32wg840f64.h	`1890 #define _DMA_RDS_RDSCH1_DEFAULT 0x00000000UL /< Mode … macro 1891 #define DMA_RDS_RDSCH1_DEFAULT (_DMA_RDS_RDSCH1_DEFAULT << 1) /< Shift…`
D	efm32wg842f256.h	`1890 #define _DMA_RDS_RDSCH1_DEFAULT 0x00000000UL /< Mode … macro 1891 #define DMA_RDS_RDSCH1_DEFAULT (_DMA_RDS_RDSCH1_DEFAULT << 1) /< Shift…`
D	efm32wg330f256.h	`1898 #define _DMA_RDS_RDSCH1_DEFAULT 0x00000000UL /< Mode … macro 1899 #define DMA_RDS_RDSCH1_DEFAULT (_DMA_RDS_RDSCH1_DEFAULT << 1) /< Shift…`
D	efm32wg330f64.h	`1898 #define _DMA_RDS_RDSCH1_DEFAULT 0x00000000UL /< Mode … macro 1899 #define DMA_RDS_RDSCH1_DEFAULT (_DMA_RDS_RDSCH1_DEFAULT << 1) /< Shift…`
D	efm32wg332f128.h	`1898 #define _DMA_RDS_RDSCH1_DEFAULT 0x00000000UL /< Mode … macro 1899 #define DMA_RDS_RDSCH1_DEFAULT (_DMA_RDS_RDSCH1_DEFAULT << 1) /< Shift…`
D	efm32wg332f256.h	`1898 #define _DMA_RDS_RDSCH1_DEFAULT 0x00000000UL /< Mode … macro 1899 #define DMA_RDS_RDSCH1_DEFAULT (_DMA_RDS_RDSCH1_DEFAULT << 1) /< Shift…`
D	efm32wg332f64.h	`1898 #define _DMA_RDS_RDSCH1_DEFAULT 0x00000000UL /< Mode … macro 1899 #define DMA_RDS_RDSCH1_DEFAULT (_DMA_RDS_RDSCH1_DEFAULT << 1) /< Shift…`
D	efm32wg840f128.h	`1890 #define _DMA_RDS_RDSCH1_DEFAULT 0x00000000UL /< Mode … macro 1891 #define DMA_RDS_RDSCH1_DEFAULT (_DMA_RDS_RDSCH1_DEFAULT << 1) /< Shift…`
D	efm32wg940f128.h	`1903 #define _DMA_RDS_RDSCH1_DEFAULT 0x00000000UL /< Mode … macro 1904 #define DMA_RDS_RDSCH1_DEFAULT (_DMA_RDS_RDSCH1_DEFAULT << 1) /< Shift…`
D	efm32wg940f256.h	`1903 #define _DMA_RDS_RDSCH1_DEFAULT 0x00000000UL /< Mode … macro 1904 #define DMA_RDS_RDSCH1_DEFAULT (_DMA_RDS_RDSCH1_DEFAULT << 1) /< Shift…`
D	efm32wg942f128.h	`1903 #define _DMA_RDS_RDSCH1_DEFAULT 0x00000000UL /< Mode … macro 1904 #define DMA_RDS_RDSCH1_DEFAULT (_DMA_RDS_RDSCH1_DEFAULT << 1) /< Shift…`
D	efm32wg942f256.h	`1903 #define _DMA_RDS_RDSCH1_DEFAULT 0x00000000UL /< Mode … macro 1904 #define DMA_RDS_RDSCH1_DEFAULT (_DMA_RDS_RDSCH1_DEFAULT << 1) /< Shift…`
D	efm32wg942f64.h	`1903 #define _DMA_RDS_RDSCH1_DEFAULT 0x00000000UL /< Mode … macro 1904 #define DMA_RDS_RDSCH1_DEFAULT (_DMA_RDS_RDSCH1_DEFAULT << 1) /< Shift…`
D	efm32wg330f128.h	`1898 #define _DMA_RDS_RDSCH1_DEFAULT 0x00000000UL /< Mode … macro 1899 #define DMA_RDS_RDSCH1_DEFAULT (_DMA_RDS_RDSCH1_DEFAULT << 1) /< Shift…`
D	efm32wg232f256.h	`1885 #define _DMA_RDS_RDSCH1_DEFAULT 0x00000000UL /< Mode … macro 1886 #define DMA_RDS_RDSCH1_DEFAULT (_DMA_RDS_RDSCH1_DEFAULT << 1) /< Shift…`
D	efm32wg232f64.h	`1885 #define _DMA_RDS_RDSCH1_DEFAULT 0x00000000UL /< Mode … macro 1886 #define DMA_RDS_RDSCH1_DEFAULT (_DMA_RDS_RDSCH1_DEFAULT << 1) /< Shift…`
D	efm32wg940f64.h	`1903 #define _DMA_RDS_RDSCH1_DEFAULT 0x00000000UL /< Mode … macro 1904 #define DMA_RDS_RDSCH1_DEFAULT (_DMA_RDS_RDSCH1_DEFAULT << 1) /< Shift…`
D	efm32wg230f256.h	`1885 #define _DMA_RDS_RDSCH1_DEFAULT 0x00000000UL /< Mode … macro 1886 #define DMA_RDS_RDSCH1_DEFAULT (_DMA_RDS_RDSCH1_DEFAULT << 1) /< Shift…`
D	efm32wg230f64.h	`1885 #define _DMA_RDS_RDSCH1_DEFAULT 0x00000000UL /< Mode … macro 1886 #define DMA_RDS_RDSCH1_DEFAULT (_DMA_RDS_RDSCH1_DEFAULT << 1) /< Shift…`

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
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