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Searched refs:_DMA_IFS_CH3DONE_DEFAULT (Results 1 – 25 of 35) sorted by relevance

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/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32HG/Include/
Defm32hg_dma.h704 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode D… macro
705 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shifte…
Defm32hg321f32.h1064 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode D… macro
1065 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shifte…
Defm32hg321f64.h1064 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode D… macro
1065 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shifte…
Defm32hg108f32.h1110 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode D… macro
1111 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shifte…
Defm32hg108f64.h1110 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode D… macro
1111 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shifte…
Defm32hg308f32.h1122 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode D… macro
1123 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shifte…
Defm32hg308f64.h1122 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode D… macro
1123 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shifte…
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32WG/Include/
Defm32wg_dma.h1162 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode… macro
1163 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shif…
Defm32wg360f128.h1599 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode… macro
1600 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shif…
Defm32wg360f256.h1599 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode… macro
1600 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shif…
Defm32wg360f64.h1599 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode… macro
1600 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shif…
Defm32wg842f128.h1679 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode… macro
1680 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shif…
Defm32wg840f256.h1679 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode… macro
1680 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shif…
Defm32wg840f64.h1679 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode… macro
1680 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shif…
Defm32wg842f256.h1679 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode… macro
1680 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shif…
Defm32wg330f256.h1687 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode… macro
1688 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shif…
Defm32wg330f64.h1687 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode… macro
1688 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shif…
Defm32wg332f128.h1687 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode… macro
1688 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shif…
Defm32wg332f256.h1687 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode… macro
1688 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shif…
Defm32wg332f64.h1687 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode… macro
1688 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shif…
Defm32wg840f128.h1679 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode… macro
1680 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shif…
Defm32wg940f128.h1692 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode… macro
1693 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shif…
Defm32wg940f256.h1692 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode… macro
1693 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shif…
Defm32wg942f128.h1692 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode… macro
1693 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shif…
Defm32wg942f256.h1692 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode… macro
1693 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shif…

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