/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32HG/Include/ |
D | efm32hg_dma.h | 704 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode D… macro 705 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shifte…
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D | efm32hg321f32.h | 1064 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode D… macro 1065 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shifte…
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D | efm32hg321f64.h | 1064 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode D… macro 1065 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shifte…
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D | efm32hg108f32.h | 1110 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode D… macro 1111 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shifte…
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D | efm32hg108f64.h | 1110 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode D… macro 1111 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shifte…
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D | efm32hg308f32.h | 1122 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode D… macro 1123 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shifte…
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D | efm32hg308f64.h | 1122 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode D… macro 1123 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shifte…
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/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32WG/Include/ |
D | efm32wg_dma.h | 1162 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode… macro 1163 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shif…
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D | efm32wg360f128.h | 1599 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode… macro 1600 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shif…
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D | efm32wg360f256.h | 1599 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode… macro 1600 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shif…
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D | efm32wg360f64.h | 1599 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode… macro 1600 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shif…
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D | efm32wg842f128.h | 1679 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode… macro 1680 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shif…
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D | efm32wg840f256.h | 1679 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode… macro 1680 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shif…
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D | efm32wg840f64.h | 1679 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode… macro 1680 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shif…
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D | efm32wg842f256.h | 1679 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode… macro 1680 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shif…
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D | efm32wg330f256.h | 1687 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode… macro 1688 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shif…
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D | efm32wg330f64.h | 1687 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode… macro 1688 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shif…
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D | efm32wg332f128.h | 1687 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode… macro 1688 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shif…
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D | efm32wg332f256.h | 1687 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode… macro 1688 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shif…
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D | efm32wg332f64.h | 1687 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode… macro 1688 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shif…
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D | efm32wg840f128.h | 1679 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode… macro 1680 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shif…
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D | efm32wg940f128.h | 1692 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode… macro 1693 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shif…
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D | efm32wg940f256.h | 1692 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode… macro 1693 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shif…
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D | efm32wg942f128.h | 1692 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode… macro 1693 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shif…
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D | efm32wg942f256.h | 1692 #define _DMA_IFS_CH3DONE_DEFAULT 0x00000000UL /**< Mode… macro 1693 #define DMA_IFS_CH3DONE_DEFAULT (_DMA_IFS_CH3DONE_DEFAULT << 3) /**< Shif…
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