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Searched refs:_DMA_CH_CTRL_SOURCESEL_TIMER1 (Results 1 – 25 of 35) sorted by relevance

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/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32HG/Include/
Defm32hg_dma.h878 #define _DMA_CH_CTRL_SOURCESEL_TIMER1 0x00000019UL … macro
889 #define DMA_CH_CTRL_SOURCESEL_TIMER1 (_DMA_CH_CTRL_SOURCESEL_TIMER1 << 16) …
Defm32hg321f32.h1230 #define _DMA_CH_CTRL_SOURCESEL_TIMER1 0x00000019UL … macro
1240 #define DMA_CH_CTRL_SOURCESEL_TIMER1 (_DMA_CH_CTRL_SOURCESEL_TIMER1 << 16) …
Defm32hg321f64.h1230 #define _DMA_CH_CTRL_SOURCESEL_TIMER1 0x00000019UL … macro
1240 #define DMA_CH_CTRL_SOURCESEL_TIMER1 (_DMA_CH_CTRL_SOURCESEL_TIMER1 << 16) …
Defm32hg108f32.h1271 #define _DMA_CH_CTRL_SOURCESEL_TIMER1 0x00000019UL … macro
1280 #define DMA_CH_CTRL_SOURCESEL_TIMER1 (_DMA_CH_CTRL_SOURCESEL_TIMER1 << 16) …
Defm32hg108f64.h1271 #define _DMA_CH_CTRL_SOURCESEL_TIMER1 0x00000019UL … macro
1280 #define DMA_CH_CTRL_SOURCESEL_TIMER1 (_DMA_CH_CTRL_SOURCESEL_TIMER1 << 16) …
Defm32hg308f32.h1283 #define _DMA_CH_CTRL_SOURCESEL_TIMER1 0x00000019UL … macro
1292 #define DMA_CH_CTRL_SOURCESEL_TIMER1 (_DMA_CH_CTRL_SOURCESEL_TIMER1 << 16) …
Defm32hg308f64.h1283 #define _DMA_CH_CTRL_SOURCESEL_TIMER1 0x00000019UL … macro
1292 #define DMA_CH_CTRL_SOURCESEL_TIMER1 (_DMA_CH_CTRL_SOURCESEL_TIMER1 << 16) …
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32WG/Include/
Defm32wg_dma.h1604 #define _DMA_CH_CTRL_SOURCESEL_TIMER1 0x00000019UL … macro
1624 #define DMA_CH_CTRL_SOURCESEL_TIMER1 (_DMA_CH_CTRL_SOURCESEL_TIMER1 << 16) …
Defm32wg360f128.h2033 #define _DMA_CH_CTRL_SOURCESEL_TIMER1 0x00000019UL … macro
2052 #define DMA_CH_CTRL_SOURCESEL_TIMER1 (_DMA_CH_CTRL_SOURCESEL_TIMER1 << 16) …
Defm32wg360f256.h2033 #define _DMA_CH_CTRL_SOURCESEL_TIMER1 0x00000019UL … macro
2052 #define DMA_CH_CTRL_SOURCESEL_TIMER1 (_DMA_CH_CTRL_SOURCESEL_TIMER1 << 16) …
Defm32wg360f64.h2033 #define _DMA_CH_CTRL_SOURCESEL_TIMER1 0x00000019UL … macro
2052 #define DMA_CH_CTRL_SOURCESEL_TIMER1 (_DMA_CH_CTRL_SOURCESEL_TIMER1 << 16) …
Defm32wg842f128.h2101 #define _DMA_CH_CTRL_SOURCESEL_TIMER1 0x00000019UL … macro
2118 #define DMA_CH_CTRL_SOURCESEL_TIMER1 (_DMA_CH_CTRL_SOURCESEL_TIMER1 << 16) …
Defm32wg840f256.h2101 #define _DMA_CH_CTRL_SOURCESEL_TIMER1 0x00000019UL … macro
2118 #define DMA_CH_CTRL_SOURCESEL_TIMER1 (_DMA_CH_CTRL_SOURCESEL_TIMER1 << 16) …
Defm32wg840f64.h2101 #define _DMA_CH_CTRL_SOURCESEL_TIMER1 0x00000019UL … macro
2118 #define DMA_CH_CTRL_SOURCESEL_TIMER1 (_DMA_CH_CTRL_SOURCESEL_TIMER1 << 16) …
Defm32wg842f256.h2101 #define _DMA_CH_CTRL_SOURCESEL_TIMER1 0x00000019UL … macro
2118 #define DMA_CH_CTRL_SOURCESEL_TIMER1 (_DMA_CH_CTRL_SOURCESEL_TIMER1 << 16) …
Defm32wg330f256.h2109 #define _DMA_CH_CTRL_SOURCESEL_TIMER1 0x00000019UL … macro
2126 #define DMA_CH_CTRL_SOURCESEL_TIMER1 (_DMA_CH_CTRL_SOURCESEL_TIMER1 << 16) …
Defm32wg330f64.h2109 #define _DMA_CH_CTRL_SOURCESEL_TIMER1 0x00000019UL … macro
2126 #define DMA_CH_CTRL_SOURCESEL_TIMER1 (_DMA_CH_CTRL_SOURCESEL_TIMER1 << 16) …
Defm32wg332f128.h2109 #define _DMA_CH_CTRL_SOURCESEL_TIMER1 0x00000019UL … macro
2126 #define DMA_CH_CTRL_SOURCESEL_TIMER1 (_DMA_CH_CTRL_SOURCESEL_TIMER1 << 16) …
Defm32wg332f256.h2109 #define _DMA_CH_CTRL_SOURCESEL_TIMER1 0x00000019UL … macro
2126 #define DMA_CH_CTRL_SOURCESEL_TIMER1 (_DMA_CH_CTRL_SOURCESEL_TIMER1 << 16) …
Defm32wg332f64.h2109 #define _DMA_CH_CTRL_SOURCESEL_TIMER1 0x00000019UL … macro
2126 #define DMA_CH_CTRL_SOURCESEL_TIMER1 (_DMA_CH_CTRL_SOURCESEL_TIMER1 << 16) …
Defm32wg840f128.h2101 #define _DMA_CH_CTRL_SOURCESEL_TIMER1 0x00000019UL … macro
2118 #define DMA_CH_CTRL_SOURCESEL_TIMER1 (_DMA_CH_CTRL_SOURCESEL_TIMER1 << 16) …
Defm32wg940f128.h2114 #define _DMA_CH_CTRL_SOURCESEL_TIMER1 0x00000019UL … macro
2131 #define DMA_CH_CTRL_SOURCESEL_TIMER1 (_DMA_CH_CTRL_SOURCESEL_TIMER1 << 16) …
Defm32wg940f256.h2114 #define _DMA_CH_CTRL_SOURCESEL_TIMER1 0x00000019UL … macro
2131 #define DMA_CH_CTRL_SOURCESEL_TIMER1 (_DMA_CH_CTRL_SOURCESEL_TIMER1 << 16) …
Defm32wg942f128.h2114 #define _DMA_CH_CTRL_SOURCESEL_TIMER1 0x00000019UL … macro
2131 #define DMA_CH_CTRL_SOURCESEL_TIMER1 (_DMA_CH_CTRL_SOURCESEL_TIMER1 << 16) …
Defm32wg942f256.h2114 #define _DMA_CH_CTRL_SOURCESEL_TIMER1 0x00000019UL … macro
2131 #define DMA_CH_CTRL_SOURCESEL_TIMER1 (_DMA_CH_CTRL_SOURCESEL_TIMER1 << 16) …

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