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Searched refs:_DMA_CH_CTRL_SOURCESEL_ADC0 (Results 1 – 25 of 31) sorted by relevance

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/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32HG/Include/
Defm32hg_dma.h872 #define _DMA_CH_CTRL_SOURCESEL_ADC0 0x00000008UL … macro
883 #define DMA_CH_CTRL_SOURCESEL_ADC0 (_DMA_CH_CTRL_SOURCESEL_ADC0 << 16) …
Defm32hg321f32.h1224 #define _DMA_CH_CTRL_SOURCESEL_ADC0 0x00000008UL … macro
1234 #define DMA_CH_CTRL_SOURCESEL_ADC0 (_DMA_CH_CTRL_SOURCESEL_ADC0 << 16) …
Defm32hg321f64.h1224 #define _DMA_CH_CTRL_SOURCESEL_ADC0 0x00000008UL … macro
1234 #define DMA_CH_CTRL_SOURCESEL_ADC0 (_DMA_CH_CTRL_SOURCESEL_ADC0 << 16) …
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32WG/Include/
Defm32wg_dma.h1594 #define _DMA_CH_CTRL_SOURCESEL_ADC0 0x00000008UL … macro
1614 #define DMA_CH_CTRL_SOURCESEL_ADC0 (_DMA_CH_CTRL_SOURCESEL_ADC0 << 16) …
Defm32wg360f128.h2023 #define _DMA_CH_CTRL_SOURCESEL_ADC0 0x00000008UL … macro
2042 #define DMA_CH_CTRL_SOURCESEL_ADC0 (_DMA_CH_CTRL_SOURCESEL_ADC0 << 16) …
Defm32wg360f256.h2023 #define _DMA_CH_CTRL_SOURCESEL_ADC0 0x00000008UL … macro
2042 #define DMA_CH_CTRL_SOURCESEL_ADC0 (_DMA_CH_CTRL_SOURCESEL_ADC0 << 16) …
Defm32wg360f64.h2023 #define _DMA_CH_CTRL_SOURCESEL_ADC0 0x00000008UL … macro
2042 #define DMA_CH_CTRL_SOURCESEL_ADC0 (_DMA_CH_CTRL_SOURCESEL_ADC0 << 16) …
Defm32wg842f128.h2091 #define _DMA_CH_CTRL_SOURCESEL_ADC0 0x00000008UL … macro
2108 #define DMA_CH_CTRL_SOURCESEL_ADC0 (_DMA_CH_CTRL_SOURCESEL_ADC0 << 16) …
Defm32wg840f256.h2091 #define _DMA_CH_CTRL_SOURCESEL_ADC0 0x00000008UL … macro
2108 #define DMA_CH_CTRL_SOURCESEL_ADC0 (_DMA_CH_CTRL_SOURCESEL_ADC0 << 16) …
Defm32wg840f64.h2091 #define _DMA_CH_CTRL_SOURCESEL_ADC0 0x00000008UL … macro
2108 #define DMA_CH_CTRL_SOURCESEL_ADC0 (_DMA_CH_CTRL_SOURCESEL_ADC0 << 16) …
Defm32wg842f256.h2091 #define _DMA_CH_CTRL_SOURCESEL_ADC0 0x00000008UL … macro
2108 #define DMA_CH_CTRL_SOURCESEL_ADC0 (_DMA_CH_CTRL_SOURCESEL_ADC0 << 16) …
Defm32wg330f256.h2099 #define _DMA_CH_CTRL_SOURCESEL_ADC0 0x00000008UL … macro
2116 #define DMA_CH_CTRL_SOURCESEL_ADC0 (_DMA_CH_CTRL_SOURCESEL_ADC0 << 16) …
Defm32wg330f64.h2099 #define _DMA_CH_CTRL_SOURCESEL_ADC0 0x00000008UL … macro
2116 #define DMA_CH_CTRL_SOURCESEL_ADC0 (_DMA_CH_CTRL_SOURCESEL_ADC0 << 16) …
Defm32wg332f128.h2099 #define _DMA_CH_CTRL_SOURCESEL_ADC0 0x00000008UL … macro
2116 #define DMA_CH_CTRL_SOURCESEL_ADC0 (_DMA_CH_CTRL_SOURCESEL_ADC0 << 16) …
Defm32wg332f256.h2099 #define _DMA_CH_CTRL_SOURCESEL_ADC0 0x00000008UL … macro
2116 #define DMA_CH_CTRL_SOURCESEL_ADC0 (_DMA_CH_CTRL_SOURCESEL_ADC0 << 16) …
Defm32wg332f64.h2099 #define _DMA_CH_CTRL_SOURCESEL_ADC0 0x00000008UL … macro
2116 #define DMA_CH_CTRL_SOURCESEL_ADC0 (_DMA_CH_CTRL_SOURCESEL_ADC0 << 16) …
Defm32wg840f128.h2091 #define _DMA_CH_CTRL_SOURCESEL_ADC0 0x00000008UL … macro
2108 #define DMA_CH_CTRL_SOURCESEL_ADC0 (_DMA_CH_CTRL_SOURCESEL_ADC0 << 16) …
Defm32wg940f128.h2104 #define _DMA_CH_CTRL_SOURCESEL_ADC0 0x00000008UL … macro
2121 #define DMA_CH_CTRL_SOURCESEL_ADC0 (_DMA_CH_CTRL_SOURCESEL_ADC0 << 16) …
Defm32wg940f256.h2104 #define _DMA_CH_CTRL_SOURCESEL_ADC0 0x00000008UL … macro
2121 #define DMA_CH_CTRL_SOURCESEL_ADC0 (_DMA_CH_CTRL_SOURCESEL_ADC0 << 16) …
Defm32wg942f128.h2104 #define _DMA_CH_CTRL_SOURCESEL_ADC0 0x00000008UL … macro
2121 #define DMA_CH_CTRL_SOURCESEL_ADC0 (_DMA_CH_CTRL_SOURCESEL_ADC0 << 16) …
Defm32wg942f256.h2104 #define _DMA_CH_CTRL_SOURCESEL_ADC0 0x00000008UL … macro
2121 #define DMA_CH_CTRL_SOURCESEL_ADC0 (_DMA_CH_CTRL_SOURCESEL_ADC0 << 16) …
Defm32wg942f64.h2104 #define _DMA_CH_CTRL_SOURCESEL_ADC0 0x00000008UL … macro
2121 #define DMA_CH_CTRL_SOURCESEL_ADC0 (_DMA_CH_CTRL_SOURCESEL_ADC0 << 16) …
Defm32wg330f128.h2099 #define _DMA_CH_CTRL_SOURCESEL_ADC0 0x00000008UL … macro
2116 #define DMA_CH_CTRL_SOURCESEL_ADC0 (_DMA_CH_CTRL_SOURCESEL_ADC0 << 16) …
Defm32wg232f256.h2086 #define _DMA_CH_CTRL_SOURCESEL_ADC0 0x00000008UL … macro
2103 #define DMA_CH_CTRL_SOURCESEL_ADC0 (_DMA_CH_CTRL_SOURCESEL_ADC0 << 16) …
Defm32wg232f64.h2086 #define _DMA_CH_CTRL_SOURCESEL_ADC0 0x00000008UL … macro
2103 #define DMA_CH_CTRL_SOURCESEL_ADC0 (_DMA_CH_CTRL_SOURCESEL_ADC0 << 16) …

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