Searched refs:_DEVINFO_DCDCLNVCTRL0_1V8LNATT0_MASK (Results 1 – 10 of 10) sorted by relevance
757 #define _DEVINFO_DCDCLNVCTRL0_1V8LNATT0_MASK 0xFF00UL /**< Bit mask for 1V8… macro
840 #define _DEVINFO_DCDCLNVCTRL0_1V8LNATT0_MASK 0xFF00UL /**< Bit mask for 1V8… macro
788 #define _DEVINFO_DCDCLNVCTRL0_1V8LNATT0_MASK 0xFF00UL /**< Bit mask for 1V8… macro
873 #define _DEVINFO_DCDCLNVCTRL0_1V8LNATT0_MASK 0xFF00UL /**< Bit mask for 1V8… macro
1056 #define _DEVINFO_DCDCLNVCTRL0_1V8LNATT0_MASK 0xFF00UL /**< Bit mask for 1V8… macro
3030 vrefHigh[dcdcTrimMode_LN] = (vrefLow[dcdcTrimMode_LN] & _DEVINFO_DCDCLNVCTRL0_1V8LNATT0_MASK) in EMU_DCDCOutputVoltageSet()