Home
last modified time | relevance | path

Searched refs:SMU_PPUPATD1_PCNT1 (Results 1 – 25 of 64) sorted by relevance

123

/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_smu.h274 #define SMU_PPUPATD1_PCNT1 (0x1UL << 1) /**< Pulse Counter… macro
Defm32gg12b390f1024gl112.h7719 #define SMU_PPUPATD1_PCNT1 (0x1UL << 1) /**< Pulse Counter… macro
Defm32gg12b390f512gl112.h7719 #define SMU_PPUPATD1_PCNT1 (0x1UL << 1) /**< Pulse Counter… macro
Defm32gg12b110f1024iq64.h8491 #define SMU_PPUPATD1_PCNT1 (0x1UL << 1) /**< Pulse Counter… macro
Defm32gg12b510f1024gl120.h8527 #define SMU_PPUPATD1_PCNT1 (0x1UL << 1) /**< Pulse Counter… macro
Defm32gg12b510f1024gm64.h8527 #define SMU_PPUPATD1_PCNT1 (0x1UL << 1) /**< Pulse Counter… macro
Defm32gg12b510f1024gl112.h8527 #define SMU_PPUPATD1_PCNT1 (0x1UL << 1) /**< Pulse Counter… macro
Defm32gg12b530f512im64.h8527 #define SMU_PPUPATD1_PCNT1 (0x1UL << 1) /**< Pulse Counter… macro
Defm32gg12b530f512iq64.h8527 #define SMU_PPUPATD1_PCNT1 (0x1UL << 1) /**< Pulse Counter… macro
Defm32gg12b130f512gm64.h8491 #define SMU_PPUPATD1_PCNT1 (0x1UL << 1) /**< Pulse Counter… macro
Defm32gg12b130f512gq64.h8491 #define SMU_PPUPATD1_PCNT1 (0x1UL << 1) /**< Pulse Counter… macro
Defm32gg12b130f512im64.h8491 #define SMU_PPUPATD1_PCNT1 (0x1UL << 1) /**< Pulse Counter… macro
Defm32gg12b130f512iq64.h8491 #define SMU_PPUPATD1_PCNT1 (0x1UL << 1) /**< Pulse Counter… macro
Defm32gg12b530f512iq100.h8527 #define SMU_PPUPATD1_PCNT1 (0x1UL << 1) /**< Pulse Counter… macro
Defm32gg12b110f1024gm64.h8491 #define SMU_PPUPATD1_PCNT1 (0x1UL << 1) /**< Pulse Counter… macro
Defm32gg12b110f1024gq64.h8491 #define SMU_PPUPATD1_PCNT1 (0x1UL << 1) /**< Pulse Counter… macro
Defm32gg12b510f1024iq100.h8527 #define SMU_PPUPATD1_PCNT1 (0x1UL << 1) /**< Pulse Counter… macro
Defm32gg12b510f1024gq64.h8527 #define SMU_PPUPATD1_PCNT1 (0x1UL << 1) /**< Pulse Counter… macro
Defm32gg12b510f1024il112.h8527 #define SMU_PPUPATD1_PCNT1 (0x1UL << 1) /**< Pulse Counter… macro
Defm32gg12b510f1024im64.h8527 #define SMU_PPUPATD1_PCNT1 (0x1UL << 1) /**< Pulse Counter… macro
Defm32gg12b510f1024il120.h8527 #define SMU_PPUPATD1_PCNT1 (0x1UL << 1) /**< Pulse Counter… macro
Defm32gg12b510f1024gq100.h8527 #define SMU_PPUPATD1_PCNT1 (0x1UL << 1) /**< Pulse Counter… macro
Defm32gg12b530f512gm64.h8527 #define SMU_PPUPATD1_PCNT1 (0x1UL << 1) /**< Pulse Counter… macro
Defm32gg12b530f512gl120.h8527 #define SMU_PPUPATD1_PCNT1 (0x1UL << 1) /**< Pulse Counter… macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_smu.h289 #define SMU_PPUPATD1_PCNT1 (0x1UL << 1) /**< Pulse Counter… macro

123