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Searched refs:RAM1_MEM_SIZE (Results 1 – 25 of 184) sorted by relevance

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/hal_silabs-3.5.0/gecko/emlib/src/
Dem_msc.c74 #define ECC_RAM_SIZE_MAX (SL_MAX(RAM0_MEM_SIZE, RAM1_MEM_SIZE))
80 #define ECC_RAM1_MEM_SIZE (RAM1_MEM_SIZE)
104 #define ECC_RAM1_MEM_SIZE (RAM1_MEM_SIZE)
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b830f512gm64.h175 #define RAM1_MEM_SIZE (0x10000UL) /**< RAM1 available address space */ macro
Defm32gg12b830f512iq100.h175 #define RAM1_MEM_SIZE (0x10000UL) /**< RAM1 available address space */ macro
Defm32gg12b430f512il112.h175 #define RAM1_MEM_SIZE (0x10000UL) /**< RAM1 available address space */ macro
Defm32gg12b430f512il120.h175 #define RAM1_MEM_SIZE (0x10000UL) /**< RAM1 available address space */ macro
Defm32gg12b430f512iq64.h175 #define RAM1_MEM_SIZE (0x10000UL) /**< RAM1 available address space */ macro
Defm32gg12b810f1024im64.h175 #define RAM1_MEM_SIZE (0x10000UL) /**< RAM1 available address space */ macro
Defm32gg12b810f1024iq64.h175 #define RAM1_MEM_SIZE (0x10000UL) /**< RAM1 available address space */ macro
Defm32gg12b830f512gl112.h175 #define RAM1_MEM_SIZE (0x10000UL) /**< RAM1 available address space */ macro
Defm32gg12b830f512gq100.h175 #define RAM1_MEM_SIZE (0x10000UL) /**< RAM1 available address space */ macro
Defm32gg12b830f512gq64.h175 #define RAM1_MEM_SIZE (0x10000UL) /**< RAM1 available address space */ macro
Defm32gg12b830f512il112.h175 #define RAM1_MEM_SIZE (0x10000UL) /**< RAM1 available address space */ macro
Defm32gg12b830f512il120.h175 #define RAM1_MEM_SIZE (0x10000UL) /**< RAM1 available address space */ macro
Defm32gg12b830f512im64.h175 #define RAM1_MEM_SIZE (0x10000UL) /**< RAM1 available address space */ macro
Defm32gg12b410f1024gm64.h175 #define RAM1_MEM_SIZE (0x10000UL) /**< RAM1 available address space */ macro
Defm32gg12b430f512gq100.h175 #define RAM1_MEM_SIZE (0x10000UL) /**< RAM1 available address space */ macro
Defm32gg12b430f512gq64.h175 #define RAM1_MEM_SIZE (0x10000UL) /**< RAM1 available address space */ macro
Defm32gg12b810f1024gq100.h175 #define RAM1_MEM_SIZE (0x10000UL) /**< RAM1 available address space */ macro
Defm32gg12b810f1024gq64.h175 #define RAM1_MEM_SIZE (0x10000UL) /**< RAM1 available address space */ macro
Defm32gg12b810f1024il112.h175 #define RAM1_MEM_SIZE (0x10000UL) /**< RAM1 available address space */ macro
Defm32gg12b810f1024iq100.h175 #define RAM1_MEM_SIZE (0x10000UL) /**< RAM1 available address space */ macro
Defm32gg12b410f1024il112.h175 #define RAM1_MEM_SIZE (0x10000UL) /**< RAM1 available address space */ macro
Defm32gg12b410f1024iq64.h175 #define RAM1_MEM_SIZE (0x10000UL) /**< RAM1 available address space */ macro
Defm32gg12b430f512gl112.h175 #define RAM1_MEM_SIZE (0x10000UL) /**< RAM1 available address space */ macro
Defm32gg12b430f512gm64.h175 #define RAM1_MEM_SIZE (0x10000UL) /**< RAM1 available address space */ macro

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