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Searched refs:MSC (Results 1 – 25 of 345) sorted by relevance

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/hal_silabs-3.5.0/gecko/emlib/src/
Dem_msc.c82 #define ECC_CTRL_REG (MSC->ECCCTRL)
88 #define ECC_IFC_REG (MSC->IFC)
92 #define ECC_FAULT_CTRL_REG (MSC->CTRL)
109 #define ECC_CTRL_REG (MSC->ECCCTRL)
117 #define ECC_IFC_REG (MSC->IFC)
122 #define ECC_FAULT_CTRL_REG (MSC->CTRL)
214 #define MSC_IS_LOCKED() ((MSC->STATUS & _MSC_STATUS_REGLOCK_MASK) != 0U)
216 #define MSC_IS_LOCKED() ((MSC->LOCK & _MSC_LOCK_MASK) != 0U)
316 uint32_t status = MSC->STATUS; in mscStatusWait()
382 MSC->ADDRB = address; in writeBurst()
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Dem_dbg.c188 wasLocked = ((MSC->LOCK & _MSC_LOCK_MASK) != 0U); in DBG_DisableDebugAccess()
/hal_silabs-3.5.0/gecko/emlib/inc/
Dem_msc.h326 return (MSC->STATUS & _MSC_STATUS_REGLOCK_MASK) != MSC_STATUS_REGLOCK_UNLOCKED; in MSC_LockGetLocked()
328 return (MSC->LOCK & _MSC_LOCK_MASK) != MSC_LOCK_LOCKKEY_UNLOCK; in MSC_LockGetLocked()
343 MSC->LOCK = MSC_LOCK_LOCKKEY_LOCK; in MSC_LockSetLocked()
358 MSC->LOCK = MSC_LOCK_LOCKKEY_UNLOCK; in MSC_LockSetUnlocked()
376 return MSC->READCTRL; in MSC_ReadCTRLGet()
394 MSC->READCTRL = value; in MSC_ReadCTRLSet()
419 uint32_t *pagelock_registers = (uint32_t *)&MSC->PAGELOCK0; in MSC_PageLockSetLocked()
421 uint32_t *pagelock_registers = (uint32_t *)&MSC->INST_PAGELOCKWORD0; in MSC_PageLockSetLocked()
449 uint32_t *pagelock_registers = (uint32_t *)&MSC->PAGELOCK0; in MSC_PageLockGetLocked()
451 uint32_t *pagelock_registers = (uint32_t *)&MSC->INST_PAGELOCKWORD0; in MSC_PageLockGetLocked()
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Dem_chip.h66 MSC->CACHECMD = MSC_CACHECMD_INVCACHE; in CHIP_Init()
68 MSC->CMD = MSC_CMD_INVCACHE; in CHIP_Init()
269 MSC->CTRL |= 0x1UL << 8; in CHIP_Init()
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32HG/Include/
Defm32hg309f32.h323 #define MSC ((MSC_TypeDef *) MSC_BASE) /**< MSC base pointer */ macro
Defm32hg309f64.h323 #define MSC ((MSC_TypeDef *) MSC_BASE) /**< MSC base pointer */ macro
Defm32hg310f32.h323 #define MSC ((MSC_TypeDef *) MSC_BASE) /**< MSC base pointer */ macro
Defm32hg322f32.h323 #define MSC ((MSC_TypeDef *) MSC_BASE) /**< MSC base pointer */ macro
Defm32hg322f64.h323 #define MSC ((MSC_TypeDef *) MSC_BASE) /**< MSC base pointer */ macro
Defm32hg350f32.h323 #define MSC ((MSC_TypeDef *) MSC_BASE) /**< MSC base pointer */ macro
Defm32hg350f64.h323 #define MSC ((MSC_TypeDef *) MSC_BASE) /**< MSC base pointer */ macro
Defm32hg310f64.h323 #define MSC ((MSC_TypeDef *) MSC_BASE) /**< MSC base pointer */ macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32PG1B/Include/
Defm32pg1b100f128gm32.h333 #define MSC ((MSC_TypeDef *) MSC_BASE) /**< MSC base pointer */ macro
Defm32pg1b100f128im32.h333 #define MSC ((MSC_TypeDef *) MSC_BASE) /**< MSC base pointer */ macro
Defm32pg1b100f256gm32.h333 #define MSC ((MSC_TypeDef *) MSC_BASE) /**< MSC base pointer */ macro
Defm32pg1b100f256im32.h333 #define MSC ((MSC_TypeDef *) MSC_BASE) /**< MSC base pointer */ macro
Defm32pg1b200f128gm32.h335 #define MSC ((MSC_TypeDef *) MSC_BASE) /**< MSC base pointer */ macro
Defm32pg1b200f128gm48.h335 #define MSC ((MSC_TypeDef *) MSC_BASE) /**< MSC base pointer */ macro
Defm32pg1b200f128im32.h335 #define MSC ((MSC_TypeDef *) MSC_BASE) /**< MSC base pointer */ macro
Defm32pg1b200f256gm32.h335 #define MSC ((MSC_TypeDef *) MSC_BASE) /**< MSC base pointer */ macro
Defm32pg1b200f256gm48.h335 #define MSC ((MSC_TypeDef *) MSC_BASE) /**< MSC base pointer */ macro
Defm32pg1b200f256im32.h335 #define MSC ((MSC_TypeDef *) MSC_BASE) /**< MSC base pointer */ macro
Defm32pg1b200f256im48.h335 #define MSC ((MSC_TypeDef *) MSC_BASE) /**< MSC base pointer */ macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32FG1P/Include/
Defr32fg1p131f256gm48.h349 #define MSC ((MSC_TypeDef *) MSC_BASE) /**< MSC base pointer */ macro
Defr32fg1p131f256im48.h349 #define MSC ((MSC_TypeDef *) MSC_BASE) /**< MSC base pointer */ macro

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