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Searched refs:EMU_DCDCMISCCTRL_LPCMPHYSDIS (Results 1 – 25 of 70) sorted by relevance

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/hal_silabs-3.5.0/gecko/emlib/src/
Dem_emu.c269 #define EMU_DCDCMISCCTRL_LPCMPHYSDIS (0x1UL << 1) macro
2279 EMU->DCDCMISCCTRL |= EMU_DCDCMISCCTRL_LPCMPHYSDIS in dcdcValidatedConfigSet()
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_emu.h850 #define EMU_DCDCMISCCTRL_LPCMPHYSDIS (0x1UL << 1) … macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_emu.h850 #define EMU_DCDCMISCCTRL_LPCMPHYSDIS (0x1UL << 1) … macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_emu.h833 #define EMU_DCDCMISCCTRL_LPCMPHYSDIS (0x1UL << 1) … macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_emu.h850 #define EMU_DCDCMISCCTRL_LPCMPHYSDIS (0x1UL << 1) … macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_emu.h833 #define EMU_DCDCMISCCTRL_LPCMPHYSDIS (0x1UL << 1) … macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_emu.h961 #define EMU_DCDCMISCCTRL_LPCMPHYSDIS (0x1UL << 1) … macro
Defm32gg12b390f1024gl112.h3037 #define EMU_DCDCMISCCTRL_LPCMPHYSDIS (0x1UL << 1) … macro
Defm32gg12b390f512gl112.h3037 #define EMU_DCDCMISCCTRL_LPCMPHYSDIS (0x1UL << 1) … macro
Defm32gg12b110f1024iq64.h3868 #define EMU_DCDCMISCCTRL_LPCMPHYSDIS (0x1UL << 1) … macro
Defm32gg12b510f1024gl120.h3876 #define EMU_DCDCMISCCTRL_LPCMPHYSDIS (0x1UL << 1) … macro
Defm32gg12b510f1024gm64.h3876 #define EMU_DCDCMISCCTRL_LPCMPHYSDIS (0x1UL << 1) … macro
Defm32gg12b510f1024gl112.h3876 #define EMU_DCDCMISCCTRL_LPCMPHYSDIS (0x1UL << 1) … macro
Defm32gg12b530f512im64.h3876 #define EMU_DCDCMISCCTRL_LPCMPHYSDIS (0x1UL << 1) … macro
Defm32gg12b530f512iq64.h3876 #define EMU_DCDCMISCCTRL_LPCMPHYSDIS (0x1UL << 1) … macro
Defm32gg12b130f512gm64.h3868 #define EMU_DCDCMISCCTRL_LPCMPHYSDIS (0x1UL << 1) … macro
Defm32gg12b130f512gq64.h3868 #define EMU_DCDCMISCCTRL_LPCMPHYSDIS (0x1UL << 1) … macro
Defm32gg12b130f512im64.h3868 #define EMU_DCDCMISCCTRL_LPCMPHYSDIS (0x1UL << 1) … macro
Defm32gg12b130f512iq64.h3868 #define EMU_DCDCMISCCTRL_LPCMPHYSDIS (0x1UL << 1) … macro
Defm32gg12b530f512iq100.h3876 #define EMU_DCDCMISCCTRL_LPCMPHYSDIS (0x1UL << 1) … macro
Defm32gg12b110f1024gm64.h3868 #define EMU_DCDCMISCCTRL_LPCMPHYSDIS (0x1UL << 1) … macro
Defm32gg12b110f1024gq64.h3868 #define EMU_DCDCMISCCTRL_LPCMPHYSDIS (0x1UL << 1) … macro
Defm32gg12b510f1024iq100.h3876 #define EMU_DCDCMISCCTRL_LPCMPHYSDIS (0x1UL << 1) … macro
Defm32gg12b510f1024gq64.h3876 #define EMU_DCDCMISCCTRL_LPCMPHYSDIS (0x1UL << 1) … macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_emu.h969 #define EMU_DCDCMISCCTRL_LPCMPHYSDIS (0x1UL << 1) … macro

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