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Searched refs:DMA_CHREQMASKC_CH5REQMASKC (Results 1 – 25 of 35) sorted by relevance

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/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32HG/Include/
Defm32hg_dma.h357 #define DMA_CHREQMASKC_CH5REQMASKC (0x1UL << 5) … macro
Defm32hg321f32.h717 #define DMA_CHREQMASKC_CH5REQMASKC (0x1UL << 5) … macro
Defm32hg321f64.h717 #define DMA_CHREQMASKC_CH5REQMASKC (0x1UL << 5) … macro
Defm32hg108f32.h763 #define DMA_CHREQMASKC_CH5REQMASKC (0x1UL << 5) … macro
Defm32hg108f64.h763 #define DMA_CHREQMASKC_CH5REQMASKC (0x1UL << 5) … macro
Defm32hg308f32.h775 #define DMA_CHREQMASKC_CH5REQMASKC (0x1UL << 5) … macro
Defm32hg308f64.h775 #define DMA_CHREQMASKC_CH5REQMASKC (0x1UL << 5) … macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32WG/Include/
Defm32wg_dma.h515 #define DMA_CHREQMASKC_CH5REQMASKC (0x1UL << 5) … macro
Defm32wg360f128.h952 #define DMA_CHREQMASKC_CH5REQMASKC (0x1UL << 5) … macro
Defm32wg360f256.h952 #define DMA_CHREQMASKC_CH5REQMASKC (0x1UL << 5) … macro
Defm32wg360f64.h952 #define DMA_CHREQMASKC_CH5REQMASKC (0x1UL << 5) … macro
Defm32wg842f128.h1032 #define DMA_CHREQMASKC_CH5REQMASKC (0x1UL << 5) … macro
Defm32wg840f256.h1032 #define DMA_CHREQMASKC_CH5REQMASKC (0x1UL << 5) … macro
Defm32wg840f64.h1032 #define DMA_CHREQMASKC_CH5REQMASKC (0x1UL << 5) … macro
Defm32wg842f256.h1032 #define DMA_CHREQMASKC_CH5REQMASKC (0x1UL << 5) … macro
Defm32wg330f256.h1040 #define DMA_CHREQMASKC_CH5REQMASKC (0x1UL << 5) … macro
Defm32wg330f64.h1040 #define DMA_CHREQMASKC_CH5REQMASKC (0x1UL << 5) … macro
Defm32wg332f128.h1040 #define DMA_CHREQMASKC_CH5REQMASKC (0x1UL << 5) … macro
Defm32wg332f256.h1040 #define DMA_CHREQMASKC_CH5REQMASKC (0x1UL << 5) … macro
Defm32wg332f64.h1040 #define DMA_CHREQMASKC_CH5REQMASKC (0x1UL << 5) … macro
Defm32wg840f128.h1032 #define DMA_CHREQMASKC_CH5REQMASKC (0x1UL << 5) … macro
Defm32wg940f128.h1045 #define DMA_CHREQMASKC_CH5REQMASKC (0x1UL << 5) … macro
Defm32wg940f256.h1045 #define DMA_CHREQMASKC_CH5REQMASKC (0x1UL << 5) … macro
Defm32wg942f128.h1045 #define DMA_CHREQMASKC_CH5REQMASKC (0x1UL << 5) … macro
Defm32wg942f256.h1045 #define DMA_CHREQMASKC_CH5REQMASKC (0x1UL << 5) … macro

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